VT8601 Via, VT8601 Datasheet - Page 140

• Manufacturer Part Number: VT8601
• Description: Slot-1 / Socket-370 PCI North Bridge
• Manufacturer: Via

Memory Interface Registers
The registers in this group include stride and buffer base
address registers for frame buffer control. There are three
base addresses: source base address (added to blt source),
destination base address (added to color destination), and Z
base address (added to Z addresses).
GEbase + B8 – Destination Stride / Buffer Base 0 .......... RW
GEbase + BC – Destination Stride / Buffer Base 1 ......... RW
GEbase + C0 – Destination Stride / Buffer Base 2 ......... RW
GEbase + C4 – Destination Stride / Buffer Base 3 ......... RW
GEbase + C8 – Source Stride / Buffer Base 0 ................. RW
GEbase + CC – Source Stride / Buffer Base 1 ................ RW
GEbase + D0 – Source Stride / Buffer Base 2 ................. RW
GEbase + D4 – Source Stride / Buffer Base 3 ................. RW
All eight of the above registers have the same bit definitions:
GEbase + D8 – Z Depth / Z Buffer Base .......................... RW
Revision 1.3 September 8, 1999
31-29 Bits Per Pixel
28-20 Stride (pixels divided by 8)
31-30 Z Depth
28-20 Z Stride
19-0 Buffer Base Address (in quadwords)
19-0 Z Buffer Base Address (in quadwords)
29
7HFKQRORJLHV ,QF
Reserved
:H &
:H &R R QQHFW
000 8 bits per pixel
001 16 bits per pixel (565 format)
010 32 bits per pixel
011 -reserved-
100 -reserved-
101 16 bits per pixel (555 format)
11x -reserved-
00 16 bits
01 24 bits (32 bits are allocated in the frame
1x -reserved-
QQHFW
buffer with the MSB not used)
........................................ always reads 0
-134
There are 9 texture base registers for up to 9 levels of
MipMaps: level 0 (1:1 map) up to level 8 (smallest). The
texture may be in the frame buffer or in system memory.
GEbase+DC – Texture Base MipMap Level 0 (1:1 Map) RW
GEbase + E0 – Texture Base MipMap Level 1 .............. RW
GEbase + E4 – Texture Base MipMap Level 2 .............. RW
GEbase + E8 – Texture Base MipMap Level 3 .............. RW
GEbase + EC – Texture Base MipMap Level 4 ............. RW
GEbase + F0 – Texture Base MipMap Level 5 .............. RW
GEbase + F4 – Texture Base MipMap Level 6 .............. RW
GEbase + F8 – Texture Base MipMap Level 7 .............. RW
GEbase+FC – Texture Base MipMap Level 8 (Smallest) RW
All nine of the above registers have the same bit definitions:
Data Port Area
GEbase + 10000-1FFFFh – Data Port Area ................... RW
31-0 Texture Base Address (in bytes)
Base addresses always start on QWORD boundaries
so bits 2-0 are always 0.
VT8601 Apollo ProMedia
3D Graphics Engine Registers