VT8601 Via, VT8601 Datasheet - Page 66

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VT8601

Manufacturer Part Number
VT8601
Description
Slot-1 / Socket-370 PCI North Bridge
Manufacturer
Via
Datasheet

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Port 2310 – Graphics Bus Master System Start Addr ... RW
Physical Region Descriptor Table
While system memory is allocated in a non-contiguous space,
software needs to provide a physical region description table
in system memory and pass the table's starting address to
hardware.
The table size must less than or equal to 4K bytes and the
table cannot cross the 4K boundary.
EOT = End of Table
Each table entry is 4 bytes in length. Hardware assumes that
the physical page is always 4K.
physical page starting address. Bit 0 of the first byte indicates
the end of the table. Bus Master operation terminates when
the last descriptor has been retired.
Revision 1.3 September 8, 1999
Figure 5. Physical Region Descriptor Table Format
BYTE3
Page 0 physical address
Page 1 physical address
......
Page n physical address
31-0 System Start Address
7HFKQRORJLHV ,QF
If scatter / gather is enabled, bits 31:12 point to the
physical region translation table (the page starting
address must be aligned on 4KB address boundaries)
and bits 11:0 are the offset within a page.
:H &
:H &R R QQHFW
|
QQHFW
System Start Address
BYTE2
31 ................ 12 11 ...... 0
Register at 2210
|
BYTE1
Figure 6. PCI Bus Master Address Translation
Bits 31:2 indicate the
|
Description Table
Physical Region
BYTE0
|EOT
|EOT
|EOT
-60
Port 2314 – Graphics Bus Master Height ....................... RW
Port 2316 – Graphics Bus Master Width........................ RW
Port 2318 – Graphics Bus Master FB Start Addr/Pitch RW
Port 231C – Graphics Bus Master System Pitch ............ RW
Port 2320 – Graphics Bus Master Clear Data ................ RW
15-10 Reserved
15-12 Reserved
31-22 Frame Buffer Line Offset (FB pitch) in quadwords
21-20 Reserved
15-12 Reserved
11-0 Source Data Width (in bytes)
19-0 Frame Buffer Start Address (quadword aligned)
11-0 System Row Byte Offset (pitch) in bytes
31-0 Clear Data Value
9-0
Source Data Height
Used as the “clear” value for “block transfer with
clear”
Graphics Accelerator PCI Bus Master Registers
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
Physical Memory
VT8601 Apollo ProMedia

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