MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 161

• Manufacturer Part Number: MT41J64M16JT-15E AIT:G
• Description: DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
• Manufacturer: Micron

Figure 85: WRITE to READ (BC4 Mode Register Setting)
Command
DQS, DQS#
Address
DQ
CK#
CK
1
3
4
WRITE
Valid
T0
Notes:
NOP
T1
1. NOP commands are shown for ease of illustration; other commands may be valid at these times.
2.
3. The fixed BC4 setting is activated by MR0[1:0] = 10 during the WRITE command at T0 and the READ command at
4. DI n = data-in for column n.
5. BC4 (fixed), WL = 5 (AL = 0, CWL = 5), RL = 5 (AL = 0, CL = 5).
t
write data shown at T7.
Ta0.
WTR controls the WRITE-to-READ delay to the same device and starts with the first rising clock edge after the last
NOP
T2
WL = 5
NOP
T3
NOP
T4
t
WPRE
NOP
T5
DI
n
n + 1
DI
NOP
n + 2
T6
DI
n + 3
DI
t
WPST
NOP
T7
Indicates break
in time scale
NOP
T8
t
WTR
Transitioning Data
2
NOP
T9
Don’t Care
READ
Valid
Ta0