MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 195

• Manufacturer Part Number: MT41J64M16JT-15E AIT:G
• Description: DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
• Manufacturer: Micron

Table 86: ODT Parameters for Power-Down (DLL Off) Entry and Exit Transition Period
Figure 114: Synchronous to Asynchronous Transition During Precharge Power-Down (DLL Off) Entry
Description
Power-down entry transition period
(power-down entry)
Power-down exit transition period
(power-down exit)
ODT to R
(ODTLon = WL - 2)
ODT to R
(ODTLoff = WL - 2)
t
or synchronous
or synchronous
ANPD
asynchronous
asynchronous
asynchronous
asynchronous
DRAM R
DRAM R
synchronous
synchronous
DRAM R
Command
ODT A
ODT B
ODT C
TT
TT
CKE
CK#
TT
CK
A
B
C
TT
TT
turn-on delay
turn-off delay
NOP
T0
REF
T1
Note:
NOP
T2
1. AL = 0; CWL = 5; ODTL(off) = WL - 2 = 3.
R
TT,nom
NOP
T3
R
TT,nom
NOP
T4
ODTLoff
t
ANPD
NOP
T5
Lesser of:
Lesser of:
ODTLon ×
ODTLoff ×
NOP
T6
t
t
AONPD (MIN) (2ns) or
AOFPD (MIN) (2ns) or
t
AOF (MIN)
t
t
t
AOF (MAX)
CK +
CK +
NOP
Min
T7
t
RFC (MIN)
R
TT,nom
t
t
Greater of:
AON (MIN)
AOF (MIN)
WL - 1 (greater of ODTLoff + 1 or ODTLon + 1)
PDE transition period
NOP
T8
NOP
T9
t
ANPD or
ODTLoff +
t
t
ANPD +
AOFPD (MIN)
T10
NOP
ODTLoff +
t
AOFPD (MAX)
t
RFC - refresh to CKE LOW
t
AOFPD (MIN)
t
t
AOFPD (MAX)
XPDLL
T11
NOP
Greater of:
Greater of:
T12
NOP
ODTLon ×
ODTLoff ×
Indicates break
in time scale
T13
NOP
t
t
AONPD (MAX) (8.5ns) or
AOFPD (MAX) (8.5ns) or
t
t
CK +
CK +
Max
Ta0
NOP
t
t
AON (MAX)
AOF (MAX)
Transitioning
Ta1
NOP
t
AOFPD (MIN)
t
AOFPD (MAX)
Ta2
NOP
Don’t Care
NOP
Ta3