MC9S12P64VQK Freescale Semiconductor, MC9S12P64VQK Datasheet - Page 174

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MC9S12P64VQK

Manufacturer Part Number
MC9S12P64VQK
Description
16-bit Microcontrollers - MCU 16 BIT 64K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12P64VQK

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
64 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to 105 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Interface Type
I2C, SCI, SPI
Program Memory Type
Flash

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12P64VQK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
S12S Debug Module (S12SDBGV2)
6.3.2.8.8
Read: If COMRV[1:0] = 00
Write: If COMRV[1:0] = 00 and DBG not armed.
6.4
This section provides a complete functional description of the DBG module. If the part is in secure mode,
the DBG module can generate breakpoints but tracing is not possible.
6.4.1
Arming the DBG module by setting ARM in DBGC1 allows triggering the state sequencer, storing of data
in the trace buffer and generation of breakpoints to the CPU. The DBG module is made up of four main
blocks, the comparators, control logic, the state sequencer, and the trace buffer.
The comparators monitor the bus activity of the CPU. All comparators can be configured to monitor
address bus activity. Comparator A can also be configured to monitor databus activity and mask out
individual data bus bits during a compare. Comparators can be configured to use R/W and word/byte
access qualification in the comparison. A match with a comparator register value can initiate a state
sequencer transition to another state (see
174
Address: 0x002F
Bits[15:8]
Bits[7:0]
Reset
Field
Field
7–0
7–0
W
R
Functional Description
S12SDBG Operation
Comparator Data High Mask Bits — The Comparator data high mask bits control whether the selected
comparator compares the data bus bits [15:8] to the corresponding comparator data compare bits. Data bus
comparisons are only performed if the TAG bit in DBGACTL is clear
0 Do not compare corresponding data bit Any value of corresponding data bit allows match.
1 Compare corresponding data bit
Bit 7
Comparator Data Low Mask Bits — The Comparator data low mask bits control whether the selected
comparator compares the data bus bits [7:0] to the corresponding comparator data compare bits. Data bus
comparisons are only performed if the TAG bit in DBGACTL is clear
0 Do not compare corresponding data bit. Any value of corresponding data bit allows match
1 Compare corresponding data bit
0
7
Debug Comparator Data Low Mask Register (DBGADLM)
Figure 6-22. Debug Comparator Data Low Mask Register (DBGADLM)
Bit 6
0
6
Table 6-30. DBGADHM Field Descriptions
Table 6-31. DBGADLM Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
Bit 5
0
5
Figure
6-24). Either forced or tagged matches are possible. Using
Bit 4
0
4
Description
Description
Bit 3
0
3
Bit 2
0
2
Freescale Semiconductor
Bit 1
0
1
Bit 0
0
0

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