MC9S12P64VQK Freescale Semiconductor, MC9S12P64VQK Datasheet - Page 281

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MC9S12P64VQK

Manufacturer Part Number
MC9S12P64VQK
Description
16-bit Microcontrollers - MCU 16 BIT 64K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12P64VQK

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
64 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to 105 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Interface Type
I2C, SCI, SPI
Program Memory Type
Flash

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12P64VQK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
8.3.3.1.2
Freescale Semiconductor
Module Base + 0x00X0
Module Base + 0x00X1
ID[10:3]
ID[2:0]
Field
Field
RTR
IDE
7-0
7-5
4
3
Reset:
Reset:
W
W
R
R
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
Remote Transmission Request — This flag reflects the status of the Remote Transmission Request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
IDR0–IDR3 for Standard Identifier Mapping
ID10
ID2
x
x
7
7
Table 8-31. IDR0 Register Field Descriptions — Standard
= Unused; always read ‘x’
Figure 8-30. Identifier Register 0 — Standard Mapping
Figure 8-31. Identifier Register 1 — Standard Mapping
ID9
ID1
6
x
6
x
Table 8-32. IDR1 Register Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
ID8
ID0
5
x
5
x
RTR
ID7
4
x
4
x
Description
Description
Freescale’s Scalable Controller Area Network (S12MSCANV3)
IDE (=0)
ID6
3
x
3
x
ID5
x
x
2
2
Table
Table
ID4
8-32.
8-31.
x
x
1
1
ID3
x
x
0
0
281

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