MC9S12P64VQK Freescale Semiconductor, MC9S12P64VQK Datasheet - Page 296

• Manufacturer Part Number: MC9S12P64VQK
• Description: 16-bit Microcontrollers - MCU 16 BIT 64K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12P64VQK

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 64 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5 V
• Operating Temperature Range: - 40 C to 105 C
• Package / Case: QFP-80
• Mounting Style: SMD/SMT
• Interface Type: I2C, SCI, SPI
• Program Memory Type: Flash

Freescale’s Scalable Controller Area Network (S12MSCANV3)
8.4.4.2
The MSCAN module behaves as described within this specification in all special system operating modes.
Write restrictions which exist on specific registers in normal modes are lifted for test purposes in special
modes.
8.4.4.3
In all emulation modes, the MSCAN module behaves just like in normal system operating modes as
described within this specification.
8.4.4.4
In an optional CAN bus monitoring mode (listen-only), the CAN node is able to receive valid data frames
and valid remote frames, but it sends only “recessive” bits on the CAN bus. In addition, it cannot start a
transmission.
If the MAC sub-layer is required to send a “dominant” bit (ACK bit, overload flag, or active error flag), the
bit is rerouted internally so that the MAC sub-layer monitors this “dominant” bit, although the CAN bus
may remain in recessive state externally.
8.4.4.5
The MSCAN enters initialization mode when it is enabled (CANE=1).
When entering initialization mode during operation, any on-going transmission or reception is
immediately aborted and synchronization to the CAN bus is lost, potentially causing CAN protocol
violations. To protect the CAN bus system from fatal consequences of violations, the MSCAN
immediately drives TXCAN into a recessive state.
In initialization mode, the MSCAN is stopped. However, interface registers remain accessible. This mode
is used to reset the CANCTL0, CANRFLG, CANRIER, CANTFLG, CANTIER, CANTARQ,
CANTAAK, and CANTBSEL registers to their default values. In addition, the MSCAN enables the
configuration of the CANBTR0, CANBTR1 bit timing registers; CANIDAC; and the CANIDAR,
CANIDMR message filters. See
detailed description of the initialization mode.
296
Special System Operating Modes
Emulation Modes
Listen-Only Mode
MSCAN Initialization Mode
The user is responsible for ensuring that the MSCAN is not active when
initialization mode is entered. The recommended procedure is to bring the
MSCAN into sleep mode (SLPRQ = 1 and SLPAK = 1) before setting the
INITRQ bit in the CANCTL0 register. Otherwise, the abort of an on-going
message can cause an error condition and can impact other CAN bus
devices.
Section 8.3.2.1, “MSCAN Control Register 0
S12P-Family Reference Manual, Rev. 1.13
NOTE
(CANCTL0),” for a
Freescale Semiconductor