MC9S12P64VQK Freescale Semiconductor, MC9S12P64VQK Datasheet - Page 63
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MC9S12P64VQK
Manufacturer Part Number
MC9S12P64VQK
Description
16-bit Microcontrollers - MCU 16 BIT 64K FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12P64VQK.pdf
(566 pages)
Specifications of MC9S12P64VQK
Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
64 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to 105 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Interface Type
I2C, SCI, SPI
Program Memory Type
Flash
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12P64VQK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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1. Read: Anytime. The data source is depending on the data direction value.
1. Read: Anytime. The data source is depending on the data direction value.
2.3.3
2.3.4
Freescale Semiconductor
Address 0x0000
Address 0x0001
Write: Anytime
Write: Anytime
Field
Field
Reset
Reset
7-0
7-0
PB
PA
W
W
R
R
Port A general purpose input/output data—Data Register
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port B general purpose input/output data—Data Register
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port A Data Register (PORTA)
Port B Data Register (PORTB)
PB7
PA7
0
0
7
7
PB6
PA6
0
0
6
6
Table 2-5. PORTB Register Field Descriptions
Table 2-4. PORTA Register Field Descriptions
Figure 2-2. Port B Data Register (PORTB)
Figure 2-1. Port A Data Register (PORTA)
S12P-Family Reference Manual, Rev. 1.13
PB5
PA5
5
0
5
0
PB4
PA4
0
0
4
4
Description
Description
PB3
PA3
0
0
3
3
PB2
PA2
0
0
2
2
Port Integration Module (S12PPIMV1)
Access: User read/write
Access: User read/write
PA1
PB1
0
0
1
1
PA0
PB0
0
0
0
0
63
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