S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 1051
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S9S12G64F0CLFR
Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
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All possible P-Flash protection scenarios are shown in
loaded from the Flash memory at global address 0x3_FF0C during the reset sequence, it can be changed
by the user. The P-Flash protection scheme can be used by applications requiring reprogramming in single
chip mode while providing as much protection as possible if reprogramming is not required.
Freescale Semiconductor
FPLS[1:0]
FPLDIS
Field
1–0
2
Flash Protection Lower Address Range Disable — The FPLDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory beginning with global address 0x3_8000.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Lower Address Size — The FPLS bits determine the size of the protected/unprotected area
in P-Flash memory as shown in
1
FPOPEN
For range sizes, refer to
FPHS[1:0]
FPLS[1:0]
1
1
1
1
0
0
0
0
Table 29-19. P-Flash Protection Higher Address Range
Table 29-20. P-Flash Protection Lower Address Range
00
01
10
11
00
01
10
11
Table 29-17. FPROT Field Descriptions (continued)
FPHDIS
MC9S12G Family Reference Manual, Rev.1.23
Table 29-18. P-Flash Protection Function
1
1
0
0
1
1
0
0
Table
Global Address Range
Global Address Range
0x3_C000–0x3_FFFF
0x3_F800–0x3_FFFF
0x3_F000–0x3_FFFF
0x3_E000–0x3_FFFF
Table 29-19
0x3_8000–0x3_83FF
0x3_8000–0x3_87FF
0x3_8000–0x3_8FFF
0x3_8000–0x3_9FFF
FPLDIS
29-20. The FPLS bits can only be written to while the FPLDIS bit is set.
1
0
1
0
1
0
1
0
and
No P-Flash Protection
Protected Low Range
Protected High Range
Protected High and Low Ranges
Full P-Flash Memory Protected
Unprotected Low Range
Unprotected High Range
Unprotected High and Low Ranges
Description
Table
Figure 29-14
29-20.
Function
128 KByte Flash Module (S12FTMRG128K1V1)
. Although the protection scheme is
Protected Size
Protected Size
16 Kbytes
2 Kbytes
4 Kbytes
8 Kbytes
2 Kbytes
4 Kbytes
8 Kbytes
1
1 Kbyte
1053
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