S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 376
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S9S12G64F0CLFR
Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
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S12 Clock, Reset and Power Management Unit (S12CPMU)
10.3.2.6
This register controls S12CPMU clock selection.
Read: Anytime
Write:
378
0x0039
Reset
1. Only possible if PROT=0 (CPMUPROT register) in all MCU Modes (Normal and Special Mode).
2. All bits in Special Mode (if PROT=0).
3. PLLSEL, PSTP, PRE, PCE, RTIOSCSEL: In Normal Mode (if PROT=0).
4. COPOSCSEL0: In Normal Mode (if PROT=0) until CPMUCOP write once has taken place.
5. COPOSCSEL1: In Normal Mode (if PROT=0) until CPMUCOP write once is taken.
W
R
PLLSEL
If COPOSCSEL0 was cleared by UPOSC=0 (entering Full Stop Mode with COPOSCSEL0=1
or insufficient OSCCLK quality), then COPOSCSEL0 can be set once again.
COPOSCSEL1 will not be cleared by UPOSC=0 (entering Full Stop Mode with
COPOSCSEL1=1 or insufficient OSCCLK quality if OSCCLK is used as clock source for
other clock domains: for instance core clock etc.).
S12CPMU Clock Select Register (CPMUCLKS)
1
7
After writing CPMUCLKS register, it is strongly recommended to read
back CPMUCLKS register to make sure that write of PLLSEL,
RTIOSCSEL, COPOSCSEL0 and COPOSCSEL1 was successful.
= Unimplemented or Reserved
Figure 10-9. S12CPMU Clock Select Register (CPMUCLKS)
PSTP
0
6
MC9S12G Family Reference Manual,
0
0
5
OSCSEL1
COP
NOTE
0
4
PRE
0
3
Rev.1.23
PCE
0
2
OSCSEL
Freescale Semiconductor
RTI
0
1
OSCSEL0
COP
0
0
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