S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 179
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S9S12G64F0CLFR
Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
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Freescale Semiconductor
PAD15
PAD14
PAD13
PAD12
• 64/100 LQFP: The unbuffered analog output signal DACU0 of the DAC0 module is mapped to this pin
• 64/100 LQFP: If routing is inactive (PRR1[PRR1AN]=0) the ADC analog input channel signal AN15
• 64/100 LQFP: Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
• 64/100 LQFP: The non-inverting analog input signal AMPP0 of the DAC0 module is mapped to this pin
• 64/100 LQFP: If routing is inactive (PRR1[PRR1AN]=0) the ADC analog input channel signal AN14
• 64/100 LQFP: Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
• 64/100 LQFP: The inverting analog input signal AMPM0 of the DAC0 module is mapped to this pin if
• 64/100 LQFP: If routing is inactive (PRR1[PRR1AN]=0) the ADC analog input channel signal AN13
• 64/100 LQFP: Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
• 64/100 LQFP: The ADC analog input channel signal AN12 and the related digital trigger input are
• 64/100 LQFP: Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
if the DAC is operating in “unbuffered DAC” mode. If this pin is used with the DAC then the digital I/O
function and pull device are disabled.
and the related digital trigger input are mapped to this pin. The ADC function has no effect on the
output state. Refer to
64/100 LQFP: DACU0 > GPO
if the DAC is operating in “unbuffered DAC with operational amplifier” or “operational amplifier only”
mode. If this pin is used with the DAC then the digital input buffer is disabled.
and the related digital trigger input are mapped to this pin. The ADC function has no effect on the
output state. Refer to
64/100 LQFP: GPO
the DAC is operating in “unbuffered DAC with operational amplifier” or “operational amplifier only”
mode. If this pin is used with the DAC then the digital input buffer is disabled.
and the related digital trigger input are mapped to this pin. The ADC function has no effect on the
output state. Refer to
64/100 LQFP: GPO
mapped to this pin. The ADC function has no effect on the output state. Refer to
buffer control.
64/100 LQFP: GPO
MC9S12G Family Reference Manual, Rev.1.23
NOTE/2-180
NOTE/2-180
NOTE/2-180
Table 2-16. Port
for input buffer control.
for input buffer control.
for input buffer control.
AD
Pins AD15-8
Port Integration Module (S12GPIMV1)
NOTE/2-180
for input
181
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