S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 974
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S9S12G64F0CLFR
Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
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64 KByte Flash Module (S12FTMRG64K1V1)
27.4.6.15 Program EEPROM Command
The Program EEPROM operation programs one to four previously erased words in the EEPROM block.
The Program EEPROM operation will confirm that the targeted location(s) were successfully programmed
upon completion.
Upon clearing CCIF to launch the Program EEPROM command, the user-supplied words will be
transferred to the Memory Controller and be programmed if the area is unprotected. The CCOBIX index
value at Program EEPROM command launch determines how many words will be programmed in the
EEPROM block. The CCIF flag is set when the operation has completed.
976
Register
FSTAT
A Flash word must be in the erased state before being programmed.
Cumulative programming of bits within a Flash word is not allowed.
Table 27-61. Erase Verify EEPROM Section Command Error Handling
Table 27-62. Program EEPROM Command FCCOB Requirements
CCOBIX[2:0]
MGSTAT1
MGSTAT0
ACCERR
Error Bit
FPVIOL
000
001
010
011
100
101
MC9S12G Family Reference Manual,
Set if CCOBIX[2:0] != 010 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:0] is supplied
Set if a misaligned word address is supplied (global address [0] != 0)
Set if the requested section breaches the end of the EEPROM block
None
Set if any errors have been encountered during the read or if blank check failed.
Set if any non-correctable errors have been encountered during the read or if
blank check failed.
Global address [15:0] of word to be programmed
0x11
Word 1 program value, if desired
Word 2 program value, if desired
Word 3 program value, if desired
CAUTION
Word 0 program value
FCCOB Parameters
Error Condition
identify the EEPROM block
Global address [17:16] to
Rev.1.23
Table
27-27)
Freescale Semiconductor
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