S9S12P64J0CFTR Freescale Semiconductor, S9S12P64J0CFTR Datasheet - Page 111
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S9S12P64J0CFTR
Manufacturer Part Number
S9S12P64J0CFTR
Description
16-bit Microcontrollers - MCU 16-bit 64K Flash
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12P64VQK.pdf
(566 pages)
Specifications of S9S12P64J0CFTR
Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
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Read: Anytime.
Write: Only if a transition is allowed (see
The MODC bit of the MODE register is used to select the MCU’s operating mode.
3.3.2.2
Read: Anytime
Write: anytime in special SS, writr-one in NS.
This register determines the position of the 256 Byte direct page within the memory map.It is valid for both
global and local mapping scheme.
Freescale Semiconductor
Address: 0x0011
Reset
MODC
Field
7
W
R
DP15
Mode Select Bit — This bit controls the current operating mode during RESET high (inactive). The external
mode pin MODC determines the operating mode during RESET low (active). The state of the pin is registered
into the respective register bit after the RESET signal goes inactive (see
Write restrictions exist to disallow transitions between certain modes.
changes. Attempting non authorized transitions will not change the MODE bit, but it will block further writes to
the register bit except in special modes.
Write accesses to the MODE register are blocked when the device is secured.
Direct Page Register (DIRECT)
0
7
Figure 3-4. Mode Transition Diagram when MCU is Unsecured
DP14
0
6
Single-Chip
Normal
(NS)
1
S12P-Family Reference Manual, Rev. 1.13
Figure 3-5. Direct Register (DIRECT)
Table 3-5. MODE Field Descriptions
DP13
0
5
Figure
1
DP12
RESET
3-4).
0
4
1
Description
0
DP11
0
3
Single-Chip
Special
Figure 3-4
(SS)
DP10
0
Figure
0
2
Memory Map Control (S12PMMCV1)
3-4).
illustrates all allowed mode
DP9
0
1
DP8
0
0
111
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