S9S12P64J0CFTR Freescale Semiconductor, S9S12P64J0CFTR Datasheet - Page 157

• Manufacturer Part Number: S9S12P64J0CFTR
• Description: 16-bit Microcontrollers - MCU 16-bit 64K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P64J0CFTR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

6.1.4
The DBG module can be used in all MCU functional modes.
During BDM hardware accesses and whilst the BDM module is active, CPU monitoring is disabled. When
the CPU enters active BDM Mode through a BACKGROUND command, the DBG module, if already
armed, remains armed.
The DBG module tracing is disabled if the MCU is secure, however, breakpoints can still be generated
6.1.5
6.2
There are no external signals associated with this module.
Freescale Semiconductor
Enable
BDM
x
0
0
1
1
TAGHITS
SECURE
CPU BUS
READ TRACE DATA (DBG READ DATA BUS)
External Signal Description
Modes of Operation
Block Diagram
Active
BDM
0
1
0
1
x
Secure
MCU
1
0
0
0
0
Table 6-2. Mode Dependent Restriction Summary
COMPARATOR A
COMPARATOR C
COMPARATOR B
Figure 6-1. Debug Module Block Diagram
S12P-Family Reference Manual, Rev. 1.13
Matches Enabled
Comparator
Yes
Yes
Yes
No
MATCH1
MATCH2
MATCH0
Active BDM not possible when not enabled
Breakpoints
Only SWI
Possible
Yes
Yes
No
CONTROL
MATCH
LOGIC
TAG &
TRANSITION
STATE
BREAKPOINT REQUESTS
Possible
Tagging
S12S Debug Module (S12SDBGV2)
Yes
Yes
Yes
No
TO CPU
TRACE BUFFER
TAGS
STATE SEQUENCER
STATE
TRACE
CONTROL
TRIGGER
Possible
Tracing
Yes
Yes
No
No
157