S9S12P64J0CFTR Freescale Semiconductor, S9S12P64J0CFTR Datasheet - Page 79

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S9S12P64J0CFTR

Manufacturer Part Number
S9S12P64J0CFTR
Description
16-bit Microcontrollers - MCU 16-bit 64K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P64J0CFTR

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
1. Read: Anytime
1. Read: Anytime
2.3.27
2.3.28
Freescale Semiconductor
Address 0x024B
Address 0x024C
Write: Anytime
Write: Anytime
RDRS
PERS
Field
Field
Reset
Reset
3-0
3-0
W
W
R
R
Port S reduced drive—Select reduced drive for output pin
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
Port S pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
only effect if used in wired-or mode. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
Port S Reduced Drive Register (RDRS)
Port S Pull Device Enable Register (PERS)
0
0
0
0
7
7
Figure 2-26. Port S Pull Device Enable Register (PERS)
0
0
0
0
6
6
Figure 2-25. Port S Reduced Drive Register (RDRS)
Table 2-24. RDRS Register Field Descriptions
Table 2-25. PERS Register Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
5
0
0
5
0
0
0
0
0
0
4
4
Description
Description
RDRS3
PERS3
0
1
3
3
RDRS2
PERS2
0
1
2
2
Port Integration Module (S12PPIMV1)
Access: User read/write
Access: User read/write
RDRS1
PERS1
0
1
1
1
RDRS0
PERS0
0
1
0
0
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