S9S12P64J0CFTR Freescale Semiconductor, S9S12P64J0CFTR Datasheet - Page 84

• Manufacturer Part Number: S9S12P64J0CFTR
• Description: 16-bit Microcontrollers - MCU 16-bit 64K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P64J0CFTR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

1. Read: Anytime
Port Integration Module (S12PPIMV1)
2.3.35
84
Address 0x0253
Write: Anytime
DDRM
DDRM
DDRM
RDRM
Field
Field
Reset
5-0
2
1
0
W
R
Port M data direction—
This bit determines whether the associated pin is an input or output.
Depending on the configuration of the enabled SPI the I/O state will be forced to be input or output. In this case the
data direction bit will not change.
1 Associated pin is configured as output
0 Associated pin is configured as input
Port M data direction—
This bit determines whether the associated pin is an input or output.
The enabled CAN forces the I/O state to be an output. In this case the data direction bit will not change.
1 Associated pin is configured as output
0 Associated pin is configured as input
Port M data direction—
This bit determines whether the associated pin is an input or output.
The enabled CAN forces the I/O state to be an input. In this case the data direction bit will not change.
1 Associated pin is configured as output
0 Associated pin is configured as input
Port M reduced drive—Select reduced drive for output pin
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
Port M Reduced Drive Register (RDRM)
0
0
7
Table 2-30. DDRM Register Field Descriptions (continued)
0
0
6
Figure 2-33. Port M Reduced Drive Register (RDRM)
Table 2-31. RDRM Register Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
RDRM5
5
0
RDRM4
0
4
Description
Description
RDRM3
0
3
RDRM2
0
2
Access: User read/write
Freescale Semiconductor
RDRM1
0
1
RDRM0
0
0
(1)