S9S12P64J0CFTR Freescale Semiconductor, S9S12P64J0CFTR Datasheet - Page 375

• Manufacturer Part Number: S9S12P64J0CFTR
• Description: 16-bit Microcontrollers - MCU 16-bit 64K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P64J0CFTR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

Write: Anytime
11.3.2.9
Freescale Semiconductor
Module Base + 0x0006
RXPOL
TXPOL
BRK13
TXDIR
Reset
AMAP
Field
RAF
7
4
3
2
1
0
W
R
Alternative Map — This bit controls which registers sharing the same address space are accessible. In the reset
condition the SCI behaves as previous versions. Setting AMAP=1 allows the access to another set of control and
status registers and hides the baud rate and SCI control Register 1.
0 The registers labelled SCIBDH (0x0000),SCIBDL (0x0001), SCICR1 (0x0002) are accessible
1 The registers labelled SCIASR1 (0x0000),SCIACR1 (0x0001), SCIACR2 (0x00002) are accessible
Transmit Polarity — This bit control the polarity of the transmitted data. In NRZ format, a one is represented by
a mark and a zero is represented by a space for normal polarity, and the opposite for inverted polarity. In IrDA
format, a zero is represented by short high pulse in the middle of a bit time remaining idle low for a one for normal
polarity, and a zero is represented by short low pulse in the middle of a bit time remaining idle high for a one for
inverted polarity.
0 Normal polarity
1 Inverted polarity
Receive Polarity — This bit control the polarity of the received data. In NRZ format, a one is represented by a
mark and a zero is represented by a space for normal polarity, and the opposite for inverted polarity. In IrDA
format, a zero is represented by short high pulse in the middle of a bit time remaining idle low for a one for normal
polarity, and a zero is represented by short low pulse in the middle of a bit time remaining idle high for a one for
inverted polarity.
0 Normal polarity
1 Inverted polarity
Break Transmit Character Length — This bit determines whether the transmit break character is 10 or 11 bit
respectively 13 or 14 bits long. The detection of a framing error is not affected by this bit.
0 Break character is 10 or 11 bit long
1 Break character is 13 or 14 bit long
Transmitter Pin Data Direction in Single-Wire Mode — This bit determines whether the TXD pin is going to
be used as an input or output, in the single-wire mode of operation. This bit is only relevant in the single-wire
mode of operation.
0 TXD pin to be used as an input in single-wire mode
1 TXD pin to be used as an output in single-wire mode
Receiver Active Flag — RAF is set when the receiver detects a logic 0 during the RT1 time period of the start
bit search. RAF is cleared when the receiver detects an idle character.
0 No reception in progress
1 Reception in progress
R8
SCI Data Registers (SCIDRH, SCIDRL)
0
7
= Unimplemented or Reserved
T8
0
6
Figure 11-12. SCI Data Registers (SCIDRH)
Table 11-12. SCISR2 Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
0
0
5
0
0
4
Description
0
0
3
Serial Communication Interface (S12SCIV5)
0
0
2
0
0
1
0
0
0
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