S9S12P64J0CFTR Freescale Semiconductor, S9S12P64J0CFTR Datasheet - Page 235

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S9S12P64J0CFTR

Manufacturer Part Number
S9S12P64J0CFTR
Description
16-bit Microcontrollers - MCU 16-bit 64K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P64J0CFTR

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
7.3.2.22
This register protects the clock configuration registers from accidental overwrite:
CPMUSYNR, CPMUREFDIV, CPMUCLKS, CPMUPLL, CPMUIRCTRIMH/L and CPMUOSC
Read: Anytime
Write: Anytime
Freescale Semiconductor
0x02FB
Reset
PROT
Field
0
W
R
Clock Configuration Registers Protection Bit — This bit protects the clock configuration registers from
accidental overwrite (see list of affected registers above).
Writing 0x26 to the CPMUPROT register clears the PROT bit, other write accesses set the PROT bit.
0 Protection of clock configuration registers is disabled.
1 Protection of clock configuration registers is enabled. CPMUSYNR, CPMUREFDIV, CPMUCLKS, CPMUPLL,
S12CPMU Protection Register (CPMUPROT)
0
0
7
CPMUIRCTRIMH/L and CPMUOSC registers are not writable.
Figure 7-29. S12CPMU Protection Register (CPMUPROT)
0
0
6
S12P-Family Reference Manual, Rev. 1.13
0
0
5
0
0
4
Description
S12 Clock, Reset and Power Management Unit (S12CPMU)
0
0
3
0
0
2
0
0
1
PROT
0
0
235

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