TMPSNS-RTD1 Microchip Technology, TMPSNS-RTD1 Datasheet - Page 110

• Manufacturer Part Number: TMPSNS-RTD1
• Description: BOARD EVAL PT100 RTD TEMP SENSOR
• Manufacturer: Microchip Technology

Specifications of TMPSNS-RTD1

• Sensor Type: Temperature
• Interface: USB
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: MCP3301, MCP6S26, PIC18F2550
• Processor To Be Evaluated: MCP6S26, MCP3301, MCP6024, MCP41010, PIC18F2550, TC1071, MCP6002
• Data Bus Width: 12 bit
• Interface Type: USB
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Voltage - Supply: -
• Sensitivity: -
• Sensing Range: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Not applicable / Not applicable

PIC18F2455/2550/4455/4550
9.5
The IPR registers contain the individual priority bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are two Peripheral
Interrupt Priority registers (IPR1 and IPR2). Using the
priority bits requires that the Interrupt Priority Enable
(IPEN) bit be set.
REGISTER 9-8:
DS39632E-page 108
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
SPPIP
R/W-1
IPR Registers
(1)
This bit is reserved on 28-pin devices; always maintain this bit clear.
SPPIP: Streaming Parallel Port Read/Write Interrupt Priority bit
1 = High priority
0 = Low priority
ADIP: A/D Converter Interrupt Priority bit
1 = High priority
0 = Low priority
RCIP: EUSART Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TXIP: EUSART Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
SSPIP: Master Synchronous Serial Port Interrupt Priority bit
1 = High priority
0 = Low priority
CCP1IP: CCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
TMR2IP: TMR2 to PR2 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1IP: TMR1 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
R/W-1
ADIP
IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
W = Writable bit
‘1’ = Bit is set
R/W-1
RCIP
R/W-1
TXIP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SSPIP
R/W-1
CCP1IP
R/W-1
(1)
© 2009 Microchip Technology Inc.
x = Bit is unknown
TMR2IP
R/W-1
TMR1IP
R/W-1
bit 0