C8051F330DK Silicon Laboratories Inc, C8051F330DK Datasheet - Page 109

• Manufacturer Part Number: C8051F330DK
• Description: DEV KIT FOR C8051F330/F331
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F330DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F33x
• Interface Type: RS-232
• Operating Supply Voltage: 7 V to 15 V
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F330
• Silicon Family Name: C8051F33x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F330, C8051F331
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1264

13. Oscillators
C8051F330/1/2/3/4/5 devices include a programmable internal high-frequency oscillator, a programmable
internal low-frequency oscillator, and an external oscillator drive circuit. The internal high-frequency oscilla-
tor can be enabled/disabled and calibrated using the OSCICN and OSCICL registers, as shown in
Figure 13.1. The internal low-frequency oscillator can be enabled/disabled and calibrated using the
OSCLCN register, as shown in SFR Definition 13.3. The system clock can be sourced by the external
oscillator circuit or either internal oscillator. Both internal oscillators offer a selectable post-scaling feature.
The internal oscillators’ electrical specifications are given in Table 13.1 on page 122.
13.1. Programmable Internal High-Frequency (H-F) Oscillator
All C8051F330/1/2/3/4/5 devices include a programmable internal high-frequency oscillator that defaults
as the system clock after a system reset. The internal oscillator period can be adjusted via the OSCICL
register as defined by SFR Definition 13.1.
On C8051F330/1/2/3/4/5 devices, OSCICL is factory calibrated to obtain a 24.5 MHz base frequency.
Electrical specifications for the precision internal oscillator are given in Table 13.1 on page 122. Note that
the system clock may be derived from the programmed internal oscillator divided by 1, 2, 4, or 8, as
defined by the IFCN bits in register OSCICN. The divide value defaults to 8 following a reset.
VDD
Option 2
Option 3
XTAL2
XTAL2
Option 1
Option 4
XTAL2
10M
Figure 13.1. Oscillator Diagram
XTAL1
XTAL2
OSCICL
Rev. 1.7
Circuit
OSCLF
Low Frequency
Input
Programmable
Internal Clock
Generator
OSCXCN
Oscillator
OSC
EN
EN
OSCICN
C8051F330/1/2/3/4/5
OSCLD
n
n
CLKSEL
OSCLCN
OSCLF OSCLD
SYSCLK
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