C8051F330DK Silicon Laboratories Inc, C8051F330DK Datasheet - Page 127

DEV KIT FOR C8051F330/F331

C8051F330DK

Manufacturer Part Number
C8051F330DK
Description
DEV KIT FOR C8051F330/F331
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F330DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F33x
Interface Type
RS-232
Operating Supply Voltage
7 V to 15 V
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F330
Silicon Family Name
C8051F33x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F330, C8051F331
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1264
Bits7–0: Output Configuration Bits for P0.7–P0.0 (respectively): ignored if corresponding bit in regis-
Bits7–0: P0SKIP[7:0]: Port0 Crossbar Skip Enable Bits.
Bits7–0: P1.[7:0]
P1.7
R/W
R/W
R/W
Bit7
Bit7
Bit7
ter P0MDIN is logic 0.
0: Corresponding P0.n Output is open-drain.
1: Corresponding P0.n Output is push-pull.
(Note: When SDA and SCL appear on any of the Port I/O, each are open-drain regardless
of the value of P0MDOUT).
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (VREF input, external oscil-
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P0.n pin is not skipped by the Crossbar.
1: Corresponding P0.n pin is skipped by the Crossbar.
Write - Output appears on I/O pins per Crossbar Registers.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P1MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P1MDIN. Directly reads Port
pin when configured as digital input.
0: P1.n pin is logic low.
1: P1.n pin is logic high.
P1.6
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 14.5. P0MDOUT: Port0 Output Mode
SFR Definition 14.6. P0SKIP: Port0 Skip
P1.5
R/W
R/W
R/W
Bit5
Bit5
Bit5
SFR Definition 14.7. P1: Port1
P1.4
R/W
R/W
R/W
Bit4
Bit4
Bit4
Rev. 1.7
P1.3
R/W
R/W
R/W
Bit3
Bit3
Bit3
P1.2
R/W
R/W
R/W
Bit2
Bit2
Bit2
C8051F330/1/2/3/4/5
P1.1
R/W
R/W
R/W
Bit1
Bit1
Bit1
(bit addressable)
P1.0
R/W
R/W
R/W
Bit0
Bit0
Bit0
SFR Address:
SFR Address:
SFR Address:
00000000
00000000
Reset Value
Reset Value
Reset Value
11111111
0xA4
0xD4
0x90
131

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