DK-DEV-1AGX60N Altera, DK-DEV-1AGX60N Datasheet - Page 222

• Manufacturer Part Number: DK-DEV-1AGX60N
• Description: KIT DEV ARRIA GX 1AGX60N
• Manufacturer: Altera
• Series: Arria GXr
• Type: FPGAr

Specifications of DK-DEV-1AGX60N

• Contents: Dev. Board, Quartus® II Web Edition, Reference Designs, Labs, and Complete Documentation
• For Use With/related Products: 1AGX60N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2372

4–100
Table 4–112. Maximum DCD for DDIO Output on Row I/O Pins With PLL in the Clock Path
High-Speed I/O Specifications
Table 4–114. High-Speed Timing Specifications and Definitions (Part 1 of 2)
Arria GX Device Handbook, Volume 1
SSTL-18 Class I
1.8-V HSTL Class I
1.5-V HSTL Class I
t
f
J
W
t
t
LVDS
High-Speed Timing Specifications
Maximum DCD (ps) for Row DDIO Output I/O Standard
C
H S C L K
R I S E
F A L L
Table 4–113. Maximum DCD for DDIO Output on Column I/O Pins With PLL in the Clock Path
Table 4–114
3.3-V LVTTL
3.3-V LVCMOS
2.5V
1.8V
1.5-V LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.8-V HSTL Class I
1.8-V HSTL Class II
1.5-V HSTL Class I
1.5-V HSTL Class II
1.2-V HSTL
LVPECL
Maximum DCD (ps) for Column
DDIO Output I/O Standard
lists high-speed timing specifications definitions.
High-speed receiver/transmitter input and output clock period.
High-speed receiver/transmitter input and output clock frequency.
Deserialization factor (width of parallel data bus).
PLL multiplication factor.
Low-to-high transmission time.
High-to-low transmission time.
Arria GX Devices (PLL Output
Arria GX Devices (PLL Output
–6 Speed Grade
Feeding DDIO)
–6 Speed Grade
Feeding DDIO)
180
65
70
70
Definitions
160
110
100
155
100
155
180
95
75
70
65
80
70
70
70
Chapter 4: DC and Switching Characteristics
© December 2009 Altera Corporation
Units
High-Speed I/O Specifications
ps
ps
ps
ps
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps