DK-DEV-1AGX60N Altera, DK-DEV-1AGX60N Datasheet - Page 34

• Manufacturer Part Number: DK-DEV-1AGX60N
• Description: KIT DEV ARRIA GX 1AGX60N
• Manufacturer: Altera
• Series: Arria GXr
• Type: FPGAr

Specifications of DK-DEV-1AGX60N

• Contents: Dev. Board, Quartus® II Web Edition, Reference Designs, Labs, and Complete Documentation
• For Use With/related Products: 1AGX60N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2372

2–28
Logic Array Blocks
Table 2–9. Arria GX Device Resources
Arria GX Device Handbook, Volume 1
EP1AGX20
EP1AGX35
EP1AGX50
EP1AGX60
EP1AGX90
Device
Each logic array block (LAB) consists of eight adaptive logic modules (ALMs), carry
chains, shared arithmetic chains, LAB control signals, local interconnects, and register
chain connection lines. The local interconnect transfers signals between ALMs in the
same LAB. Register chain connections transfer the output of an ALM register to the
adjacent ALM register in a LAB. The Quartus II Compiler places associated logic in a
LAB or adjacent LABs, allowing the use of local, shared arithmetic chain, and register
chain connections for performance and area efficiency.
resources.
Columns/Blocks
M512 RAM
166
197
313
326
478
Figure 2–25
shows the Arria GX LAB structure.
Columns/Blocks
M4K RAM
118
140
242
252
400
M-RAM Blocks
1
1
2
2
4
Table 2–9
© December 2009 Altera Corporation
Chapter 2: Arria GX Architecture
lists Arria GX device
Columns/Blocks
DSP Block
Logic Array Blocks
10
14
26
32
44