ST92E163-EPB/US STMicroelectronics, ST92E163-EPB/US Datasheet - Page 150

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ST92E163-EPB/US

Manufacturer Part Number
ST92E163-EPB/US
Description
KIT DEMO MASS STORAGE
Manufacturer
STMicroelectronics
Type
Microcontroller Programmerr
Datasheet

Specifications of ST92E163-EPB/US

Contents
Programmer, Cable, Power Supply, Software, Manual and more
For Use With/related Products
ST9 MCUs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number:
ST92E163-EPB/US
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0
ST92163R4 - USB PERIPHERAL (USB)
USB INTERFACE (Cont’d)
Bit 0 = SOFP_ENABLE: Start-Of-Frame Pulse
Enable.
Set by software to enable the use of the USBSOF
alternate output function.
1: USBSOF alternate function enabled
0: USBSOF output disabled
USBSOF outputs a 333.33 ns long pulse at each
frame start (actually 10 bits before the SOF packet
expected start). This pulse is not generated until
two SOF packets are received after any USB reset
or USB resume (frame timer locking) and they stop
as soon as the suspend condition is entered
(TIM_SUSP bit in USBCTLR register).
MIRROR REGISTER A (MIRRA)
R246 - Read/Write
Register page: 60
Reset value: xxxx xxxx (xxh)
Bit 7:0 = MIRA[7:0] Mirror register A, bits 7-0.
This register acts as a bit mirroring location where
software can write a byte and read it back with the
LSB and MSB position swapped.
150/230
MIRA7 MIRA6 MIRA5 MIRA4 MIRA3 MIRA2 MIRA1 MIRA0
7
0
MIRROR REGISTER B (MIRRB)
R247 - Read/Write
Register page: 60
Reset value: xxxx xxxx (xxh)
Bit 7:0 = MIRB[7:0] Mirror register B, bits 7-0.
This register acts as a bit mirroring location where
software can write a byte and read it back with the
LSB and MSB position swapped.
MIRB7 MIRB6 MIRB5 MIRB4 MIRB3 MIRB2 MIRB1 MIRB0
7
0

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