ST92E163-EPB/US STMicroelectronics, ST92E163-EPB/US Datasheet - Page 153

• Manufacturer Part Number: ST92E163-EPB/US
• Description: KIT DEMO MASS STORAGE
• Manufacturer: STMicroelectronics
• Type: Microcontroller Programmerr

Specifications of ST92E163-EPB/US

• Contents: Programmer, Cable, Power Supply, Software, Manual and more
• For Use With/related Products: ST9 MCUs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.4 MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (SCI-M)
8.4.1 Introduction
The Multiprotocol Serial Communications Inter-
face (SCI-M) offers full-duplex serial data ex-
change with a wide range of external equipment.
The SCI-M offers four operating modes: Asynchro-
nous, Asynchronous with synchronous clock, Seri-
al expansion and Synchronous.
8.4.2 Main Features
■
■
■
■
Figure 74. SCI-M Block Diagram
– 5, 6, 7, or 8 bit word length.
– Even, odd, or no parity generation and detec-
– 0, 1, 1.5, 2, 2.5, 3 stop bit generation.
– Complete status reporting capabilities.
– Line break generation and detection.
Full duplex synchronous and asynchronous
operation.
Transmit, receive, line status, and device
address interrupt generation.
Integral Baud Rate Generator capable of
dividing the input clock by any value from 2 to
2
16X data sampling clock for asynchronous
operation or the 1X clock for synchronous
operation.
Fully programmable serial interface:
16
tion.
-1 (16 bit word) and generating the internal
ST92163R4 - MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (SCI-M)
SOUT
TRANSMIT
REGISTER
TRANSMIT
REGISTER
BUFFER
SHIFT
RTS
CONTROLLER
SDS
DMA
TXCLK/CLKOUT RXCLK
ST9 CORE BUS
Frame Control
ALTERNATE
COMPARE
ADDRESS
and STATUS
REGISTER
FUNCTION
GENERATOR
CLOCK and
BAUD RATE
CONTROLLER
DMA
■
■
■
■
Programmable address indication bit (wake-up
bit) and user invisible compare logic to support
multiple microcomputer networking. Optional
character search function.
Internal diagnostic capabilities:
– Local loopback for communications link fault
– Auto-echo for communications link fault isola-
Separate interrupt/DMA channels for transmit
and receive.
In addition, a Synchronous mode supports:
– High speed communication
– Possibility of hardware synchronization (RTS/
– Programmable polarity and stand-by level for
– Programmable active edge and stand-by level
– Programmable active levels of RTS/DCD sig-
– Full Loop-Back and Auto-Echo modes for DA-
DCD
RECEIVER
REGISTER
RECEIVER
REGISTER
BUFFER
isolation.
tion.
DCD signals).
data SIN/SOUT.
for clocks CLKOUT/RXCL.
nals.
TA, CLOCKs and CONTROLs.
SHIFT
SIN
VA00169A
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