IC AVR MCU 4K 10MHZ 1.8V 32-QFN

ATMEGA48V-10MU

Manufacturer Part NumberATMEGA48V-10MU
DescriptionIC AVR MCU 4K 10MHZ 1.8V 32-QFN
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA48V-10MU datasheets
 


Specifications of ATMEGA48V-10MU

Core ProcessorAVRCore Size8-Bit
Speed10MHzConnectivityI²C, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o23
Program Memory Size4KB (2K x 16)Program Memory TypeFLASH
Eeprom Size256 x 8Ram Size512 x 8
Voltage - Supply (vcc/vdd)1.8 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFNPackage32MLF EP
Device CoreAVRFamily NameATmega
Maximum Speed10 MHzOperating Supply Voltage2.5|3.3|5 V
Data Bus Width8 BitNumber Of Programmable I/os23
Interface TypeSPI/TWI/USARTOn-chip Adc8-chx10-bit
Number Of Timers3Processor SeriesATMEGA48x
CoreAVR8Data Ram Size512 B
Maximum Clock Frequency10 MHzMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsEWAVR, EWAVR-BL
Minimum Operating Temperature- 40 CController Family/seriesAVR MEGA
No. Of I/o's23Eeprom Memory Size256Byte
Ram Memory Size512ByteCpu Speed10MHz
No. Of Timers3Rohs CompliantYes
For Use WithATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMLead Free Status / RoHS StatusLead free / RoHS Compliant
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Page 223/378

Download datasheet (8Mb)Embed
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After a repeated START condition (state 0x10) the 2-wire Serial Interface can access the same
Slave again, or a new Slave without transmitting a STOP condition. Repeated START enables
the Master to switch between Slaves, Master Transmitter mode and Master Receiver mode with-
out losing control of the bus.
Table 21-2.
Status codes for Master Transmitter Mode
Status Code
(TWSR)
Status of the 2-wire Serial Bus
Prescaler Bits
and 2-wire Serial Interface
are 0
Hardware
0x08
A START condition has been
transmitted
0x10
A repeated START condition
has been transmitted
0x18
SLA+W has been transmitted;
ACK has been received
0x20
SLA+W has been transmitted;
NOT ACK has been received
0x28
Data byte has been transmit-
ted;
ACK has been received
0x30
Data byte has been transmit-
ted;
NOT ACK has been received
0x38
Arbitration lost in SLA+W or
data bytes
2545S–AVR–07/10
Application Software Response
To/from TWDR
To TWCR
STA
STO
TWIN
T
Load SLA+W
0
0
1
Load SLA+W or
0
0
1
Load SLA+R
0
0
1
Load data byte or
0
0
1
No TWDR action or
1
0
1
No TWDR action or
0
1
1
No TWDR action
1
1
1
Load data byte or
0
0
1
No TWDR action or
1
0
1
No TWDR action or
0
1
1
No TWDR action
1
1
1
Load data byte or
0
0
1
No TWDR action or
1
0
1
No TWDR action or
0
1
1
No TWDR action
1
1
1
Load data byte or
0
0
1
No TWDR action or
1
0
1
No TWDR action or
0
1
1
No TWDR action
1
1
1
No TWDR action or
0
0
1
No TWDR action
1
0
1
ATmega48/88/168
TWE
Next Action Taken by TWI Hardware
A
X
SLA+W will be transmitted;
ACK or NOT ACK will be received
X
SLA+W will be transmitted;
ACK or NOT ACK will be received
X
SLA+R will be transmitted;
Logic will switch to Master Receiver mode
X
Data byte will be transmitted and ACK or NOT ACK will
be received
X
Repeated START will be transmitted
X
STOP condition will be transmitted and
TWSTO Flag will be reset
X
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
X
Data byte will be transmitted and ACK or NOT ACK will
be received
X
Repeated START will be transmitted
X
STOP condition will be transmitted and
TWSTO Flag will be reset
X
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
X
Data byte will be transmitted and ACK or NOT ACK will
be received
X
Repeated START will be transmitted
X
STOP condition will be transmitted and
TWSTO Flag will be reset
X
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
X
Data byte will be transmitted and ACK or NOT ACK will
be received
X
Repeated START will be transmitted
X
STOP condition will be transmitted and
TWSTO Flag will be reset
X
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
X
2-wire Serial Bus will be released and not addressed
Slave mode entered
X
A START condition will be transmitted when the bus
becomes free
223