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ATMEGA48V-10MU
ATMEGA48V-10MU | |
---|---|
Manufacturer Part Number | ATMEGA48V-10MU |
Description | IC AVR MCU 4K 10MHZ 1.8V 32-QFN |
Manufacturer | Atmel |
Series | AVR® ATmega |
ATMEGA48V-10MU datasheets |
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Specifications of ATMEGA48V-10MU | |||
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Core Processor | AVR | Core Size | 8-Bit |
Speed | 10MHz | Connectivity | I²C, SPI, UART/USART |
Peripherals | Brown-out Detect/Reset, POR, PWM, WDT | Number Of I /o | 23 |
Program Memory Size | 4KB (2K x 16) | Program Memory Type | FLASH |
Eeprom Size | 256 x 8 | Ram Size | 512 x 8 |
Voltage - Supply (vcc/vdd) | 1.8 V ~ 5.5 V | Data Converters | A/D 8x10b |
Oscillator Type | Internal | Operating Temperature | -40°C ~ 85°C |
Package / Case | 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN | Package | 32MLF EP |
Device Core | AVR | Family Name | ATmega |
Maximum Speed | 10 MHz | Operating Supply Voltage | 2.5|3.3|5 V |
Data Bus Width | 8 Bit | Number Of Programmable I/os | 23 |
Interface Type | SPI/TWI/USART | On-chip Adc | 8-chx10-bit |
Number Of Timers | 3 | Processor Series | ATMEGA48x |
Core | AVR8 | Data Ram Size | 512 B |
Maximum Clock Frequency | 10 MHz | Maximum Operating Temperature | + 85 C |
Mounting Style | SMD/SMT | 3rd Party Development Tools | EWAVR, EWAVR-BL |
Minimum Operating Temperature | - 40 C | Controller Family/series | AVR MEGA |
No. Of I/o's | 23 | Eeprom Memory Size | 256Byte |
Ram Memory Size | 512Byte | Cpu Speed | 10MHz |
No. Of Timers | 3 | Rohs Compliant | Yes |
For Use With | ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
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22. Analog Comparator
22.1
Overview
The Analog Comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator output, ACO, is set. The comparator’s output can be set to trigger
the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate
interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com-
parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is
shown in
The Power Reduction ADC bit, PRADC, in
be disabled by writing a logical zero to be able to use the ADC input MUX.
Figure 22-1. Analog Comparator Block Diagram
ADC MULTIPLEXER
Notes:
22.2
Analog Comparator Multiplexed Input
It is possible to select any of the ADC7..0 pins to replace the negative input to the Analog Com-
parator. The ADC multiplexer is used to select this input, and consequently, the ADC must be
switched off to utilize this feature. If the Analog Comparator Multiplexer Enable bit (ACME in
ADCSRB) is set and the ADC is switched off (ADEN in ADCSRA is zero), MUX2..0 in ADMUX
select the input pin to replace the negative input to the Analog Comparator, as shown in
22-1. If ACME is cleared or ADEN is set, AIN1 is applied to the negative input to the Analog
Comparator.
Table 22-1.
ACME
0
1
1
ATmega48/88/168
240
Figure
22-1.
BANDGAP
REFERENCE
ACBG
ACME
ADEN
(1)
OUTPUT
1. See
Table 22-1 on page
240.
2. Refer to
Figure 1-1 on page 2
and
placement.
Analog Comparator Multiplexed Input
ADEN
MUX2..0
x
xxx
1
xxx
0
000
“Minimizing Power Consumption” on page 40
(2)
Table 13-9 on page 83
for Analog Comparator pin
Analog Comparator Negative Input
AIN1
AIN1
ADC0
must
Table
2545S–AVR–07/10
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