IC AVR MCU 4K 10MHZ 1.8V 32-QFN

ATMEGA48V-10MU

Manufacturer Part NumberATMEGA48V-10MU
DescriptionIC AVR MCU 4K 10MHZ 1.8V 32-QFN
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA48V-10MU datasheets
 

Specifications of ATMEGA48V-10MU

Core ProcessorAVRCore Size8-Bit
Speed10MHzConnectivityI²C, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o23
Program Memory Size4KB (2K x 16)Program Memory TypeFLASH
Eeprom Size256 x 8Ram Size512 x 8
Voltage - Supply (vcc/vdd)1.8 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFNPackage32MLF EP
Device CoreAVRFamily NameATmega
Maximum Speed10 MHzOperating Supply Voltage2.5|3.3|5 V
Data Bus Width8 BitNumber Of Programmable I/os23
Interface TypeSPI/TWI/USARTOn-chip Adc8-chx10-bit
Number Of Timers3Processor SeriesATMEGA48x
CoreAVR8Data Ram Size512 B
Maximum Clock Frequency10 MHzMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsEWAVR, EWAVR-BL
Minimum Operating Temperature- 40 CController Family/seriesAVR MEGA
No. Of I/o's23Eeprom Memory Size256Byte
Ram Memory Size512ByteCpu Speed10MHz
No. Of Timers3Rohs CompliantYes
For Use WithATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMLead Free Status / RoHS StatusLead free / RoHS Compliant
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Page 58/378

Download datasheet (8Mb)Embed
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Table 11-3.
BOOTRST
1
1
0
0
Note:
The most typical and general program setup for the Reset and Interrupt Vector Addresses in
ATmega88 is:
Address Labels Code
0x000
0x001
0x002
0x003
0x004
0x005
0x006
0x007
0X008
0x009
0x00A
0x00B
0x00C
0x00D
0x00E
0x00F
0x010
0x011
0x012
0x013
0x014
0x015
0x016
0x017
0x018
0x019
;
0x01ARESET:
0x01B
0x01C
0x01D
0x01E
0x01F
ATmega48/88/168
58
Reset and Interrupt Vectors Placement in ATmega88
IVSEL
Reset Address
0
0x000
1
0x000
0
Boot Reset Address
1
Boot Reset Address
1. The Boot Reset Address is shown in
means unprogrammed while “0” means programmed.
rjmp
RESET
rjmp
EXT_INT0
rjmp
EXT_INT1
rjmp
PCINT0
rjmp
PCINT1
rjmp
PCINT2
rjmp
WDT
rjmp
TIM2_COMPA
rjmp
TIM2_COMPB
rjmp
TIM2_OVF
rjmp
TIM1_CAPT
rjmp
TIM1_COMPA
rjmp
TIM1_COMPB
rjmp
TIM1_OVF
rjmp
TIM0_COMPA
rjmp
TIM0_COMPB
rjmp
TIM0_OVF
rjmp
SPI_STC
rjmp
USART_RXC
rjmp
USART_UDRE
rjmp
USART_TXC
rjmp
ADC
rjmp
EE_RDY
rjmp
ANA_COMP
rjmp
TWI
rjmp
SPM_RDY
ldi
r16, high(RAMEND); Main program start
out
SPH,r16
ldi
r16, low(RAMEND)
out
SPL,r16
sei
<instr>
xxx
(1)
Interrupt Vectors Start Address
0x001
Boot Reset Address + 0x001
0x001
Boot Reset Address + 0x001
Table 26-6 on page
280. For the BOOTRST Fuse “1”
Comments
; Reset Handler
; IRQ0 Handler
; IRQ1 Handler
; PCINT0 Handler
; PCINT1 Handler
; PCINT2 Handler
; Watchdog Timer Handler
; Timer2 Compare A Handler
; Timer2 Compare B Handler
; Timer2 Overflow Handler
; Timer1 Capture Handler
; Timer1 Compare A Handler
; Timer1 Compare B Handler
; Timer1 Overflow Handler
; Timer0 Compare A Handler
; Timer0 Compare B Handler
; Timer0 Overflow Handler
; SPI Transfer Complete Handler
; USART, RX Complete Handler
; USART, UDR Empty Handler
; USART, TX Complete Handler
; ADC Conversion Complete Handler
; EEPROM Ready Handler
; Analog Comparator Handler
; 2-wire Serial Interface Handler
; Store Program Memory Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
2545S–AVR–07/10