ATTINY84V-10MU Atmel, ATTINY84V-10MU Datasheet - Page 147

IC MCU AVR 8K FLASH 10MHZ 20-QFN

ATTINY84V-10MU

Manufacturer Part Number
ATTINY84V-10MU
Description
IC MCU AVR 8K FLASH 10MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY84V-10MU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.13.2
8006K–AVR–10/10
ADCSRA – ADC Control and Status Register A
Table 16-5.
1.
For offset calibration purpose the offset of the certain differential channels can be measure by
selecting the same input for both negative and positive input. This calibration can be done for
ADC0, ADC3 and ADC7.
level.
• Bit 7 – ADEN: ADC Enable
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the
ADC off while a conversion is in progress, will terminate this conversion.
Bit
0x06 (0x26)
Read/Write
Initial Value
Positive Differential Input
ADC2 (PA2)
ADC3 (PA3)
ADC4 (PA4)
ADC5 (PA5)
ADC6 (PA6)
ADC7 (PA7)
For offset calibration, only. See
Differential Input channel Selections. (Continued)
ADEN
R/W
7
0
ADSC
R/W
“Operation” on page 133
6
0
Negative Differential Input
ADC1 (PA1)
ADC3 (PA3)
ADC0 (PA0)
ADC1 (PA1)
ADC2 (PA2)
ADC3 (PA3)
ADC4 (PA4
ADC5 (PA5)
ADC6 (PA6)
ADC7 (PA7)
ADC3 (PA3)
ADC5 (PA5)
ADC3 (PA3)
ADC4 (PA4)
ADC6 (PA6)
ADC3 (PA3)
ADC5 (PA5)
ADC7 (PA7)
ADC3 (PA3)
ADC6 (PA6)
ADC7 (PA7)
ADATE
R/W
5
0
“Operation” on page
(1)
(1)
ADIF
R/W
4
0
describes offset calibration in a more detailed
ADIE
R/W
3
0
133.
ADPS2
R/W
2
0
Gain 1x
101100
010000
101010
101110
110000
100100
010010
010100
010110
011000
110010
011010
110100
111010
011100
110110
111100
011110
111000
111110
100110
ATtiny24/44/84
ADPS1
R/W
1
0
MUX5:0
ADPS0
R/W
0
0
Gain 20x
101101
010001
101011
101111
110001
100101
010011
010101
010111
011001
110011
011011
110101
111011
011101
110111
111101
011111
111001
111111
100111
ADCSRA
147

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