ATTINY84V-10MU Atmel, ATTINY84V-10MU Datasheet - Page 63

IC MCU AVR 8K FLASH 10MHZ 20-QFN

ATTINY84V-10MU

Manufacturer Part Number
ATTINY84V-10MU
Description
IC MCU AVR 8K FLASH 10MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY84V-10MU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8006K–AVR–10/10
• Port A, Bit 6 – ADC6/DI/SDA/MOSI/OC1A/PCINT6
• Port A, Bit 7 – ADC7/OC0B/ICP1/PCINT7
Table 10-4
shown in
Table 10-4.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
• ADC6: Analog to Digital Converter, Channel 6
• SDA: Two-wire mode Serial Interface Data.
• DI: Data Input in USI Three-wire mode. USI Three-wire mode does not override normal port
• MOSI: Master Data output, Slave Data input for SPI channel. When the SPI is enabled as a
• OC1A, Output Compare Match output: The PA6 pin can serve as an external output for the
• PCINT6: Pin Change Interrupt source 6. The PA6 pin can serve as an external interrupt
• ADC7: Analog to Digital Converter, Channel 7
• OC0B, Output Compare Match output: The PA7 pin can serve as an external output for the
• ICP1, Input Capture Pin: The PA7 pin can act as an Input Capture Pin for Timer/Counter1.
• PCINT7: Pin Change Interrupt source 7. The PA7 pin can serve as an external interrupt
functions, so pin must be configure as an input for DI function.
Slave, this pin is configured as an input regardless of the setting of DDA6. When the SPI is
enabled as a Master, the data direction of this pin is controlled by DDA6. When the pin is
forced by the SPI to be an input, the pull-up can still be controlled by the PORTA6 bit.
Timer/Counter1 Compare Match A. The pin has to be configured as an output (DDA6 set
(one)) to serve this function. This is also the output pin for the PWM mode timer function.
source for pin change interrupt 0.
Timer/Counter0 Compare Match B. The pin has to be configured as an output (DDA7 set
(one)) to serve this function. This is also the output pin for the PWM mode timer function.
source for pin change interrupt 0.
Figure 10-5 on page
ADC7 Input
PA7/ADC7/OC0B/ICP1/
PCINT7
0
0
0
0
OC0B enable
OC0B
0
PCINT7 • PCIE0 + ADC7D
PCINT7/ICP1 Input
PCINT7 • PCIE0
and
Overriding Signals for Alternate Functions in PA7:PA5
Table 10-6
relate the alternate functions of Port A to the overriding signals
59.
PA6/ADC6/DI/SDA/MOSI/
OC1A/ PCINT6
0
0
USIWM1
(SDA + PORTA6) • DDA6
(USIWM1 • DDA6) +
OC1A enable
( USIWM1• DDA6) • OC1A
0
USISIE + (PCINT6 •
PCIE0) + ADC6D
USISIE + PCINT7 • PCIE0
DI/SDA/PCINT6 Input
ADC6 Input
.
.
PA5/ADC5/MISO/DO/
OC1B/ PCINT5
0
0
0
0
(USIWM1 • USIWM0) + OC1B
enable
USIWM1 • USIWM0 • DO +
(USIWM1 + USIWM0) • OC1B
0
PCINT5 • PCIE + ADC5D
PCINT5 • PCIE
PCINT5 Input
ADC5 Input
ATtiny24/44/84
63

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