EZ80F93AZ020SG Zilog, EZ80F93AZ020SG Datasheet - Page 165

• Manufacturer Part Number: EZ80F93AZ020SG
• Description: IC ACCLAIM MCU 64KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F93AZ020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F93x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3874; EZ80F93AZ020SG

PS015313-0508
I
The I2C_SR register is a Read Only register that contains a 5-bit status code in the five
msbs: the three lsbs are always 0. The Read Only I2C_SR registers share the same I/O
addresses as the Write Only I2C_CCR registers. See
Table 88. I
There are 29 possible status codes, as listed in
tains the status code
ated and the IFLG bit in the I2C_CTL register is not set. All other status codes correspond
to a defined state of the I
When each of these states is entered, the corresponding status code appears in this register
and the IFLG bit in the I2C_CTL register is set. When the IFLG bit is cleared, the status
code returns to
Table 89. I
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:3]
STAT
[2:0]
Code
00h
08h
10h
18h
20h
28h
30h
38h
2
C Status Register
2
2
Status
Bus error
START condition transmitted
Repeated START condition transmitted
Address and Write bit transmitted, ACK received
Address and Write bit transmitted, ACK not received
Data byte transmitted in MASTER mode, ACK received
Data byte transmitted in MASTER mode, ACK not received
Arbitration lost in address or data byte
C Status Registers(I2C_SR = 00CCh)
C Status Codes
F8h
Value
00000–
11111
000
.
F8h
, no relevant status information is available, no interrupt is gener-
2
C.
R
7
1
Description
5-bit I
Reserved.
R
6
1
2
C status code.
R
5
1
Table
R
4
1
89. When the I2C_SR register con-
Table
88.
R
3
1
Product Specification
R
2
0
I2C Serial I/O Interface
R
1
0
R
0
0
158