EZ80F93AZ020SG Zilog, EZ80F93AZ020SG Datasheet - Page 179

• Manufacturer Part Number: EZ80F93AZ020SG
• Description: IC ACCLAIM MCU 64KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F93AZ020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F93x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3874; EZ80F93AZ020SG

PS015313-0508
Table 95. ZDI Address Match Registers(ZDI_ADDR0_L = 00h, ZDI_ADDR0_H = 01h,
ZDI_ADDR0_U = 02h, ZDI_ADDR1_L = 04h, ZDI_ADDR1_H = 05h,
ZDI_ADDR1_U = 06h, ZDI_ADDR2_L = 08h, ZDI_ADDR2_H = 09h,
ZDI_ADDR2_U = 0Ah, ZDI_ADDR3_L = 0Ch, ZDI_ADDR3_H = 0Dh, and
ZDI_ADDR3_U = 0Eh in the ZDI Register Write Only Address Space)
ZDI BREAK Control Register
The ZDI BREAK Control register is used to enable BREAK points. ZDI asserts a BREAK
when the CPU instruction address, ADDR[23:0], matches the value in the ZDI Address
Match 3 registers, {ZDI_ADDR3_U, ZDI_ADDR3_H, ZDI_ADDR3_L}. BREAKs can
only occur on an instruction boundary. If the instruction address is not the beginning of an
instruction (that is, for multibyte instructions), then the BREAK occurs at the end of the
current instruction. The BRK_NEXT bit is set to 1. The BRK_NEXT bit must be reset to
0 to release the BREAK. See
Bit
Reset
CPU Access
Note: W = Write Only.
Bit
Position
[7:0]
ZDI_ADDRx_L,
ZDI_ADDRx_H,
or
ZDI_ADDRx_U
Value Description
00h–
FFh
W
X
7
Table 96
The four sets of ZDI address match registers are used for
setting the addresses for generating BREAK points.
The 24-bit addresses are supplied by {ZDI_ADDRx_U,
ZDI_ADDRx_H, ZDI_ADDRx_L, where x is 0, 1, 2, or 3.
W
X
6
on page 173.
W
X
5
W
X
4
W
X
3
Product Specification
W
X
2
eZ80F92/eZ80F93
Zilog Debug Interface
W
X
1
W
X
0
172