EZ80F93AZ020SG Zilog, EZ80F93AZ020SG Datasheet - Page 169

IC ACCLAIM MCU 64KB 100LQFP

EZ80F93AZ020SG

Manufacturer Part Number
EZ80F93AZ020SG
Description
IC ACCLAIM MCU 64KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Datasheets

Specifications of EZ80F93AZ020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Processor Series
EZ80F93x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-3874
EZ80F93AZ020SG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F93AZ020SG
Manufacturer:
Zilog
Quantity:
10 000
Zilog Debug Interface
PS015313-0508
Introduction
The Zilog Debug Interface (ZDI) provides a built-in debugging interface to the eZ80
CPU. ZDI provides basic in-circuit emulation features including:
The above features are built into the silicon. Control is provided via a two-wire interface
that is connected to the USB Smart Cable Debug Interface Tool.
cal setup using a a target board, USB Smart Cable, and the host PC running ZDS. Visit
www.zilog.com
Examining and modifying internal registers
Examining and modifying memory
Starting and stopping the user program
Setting program and data BREAK points
Single-stepping the user program
Executing user-supplied instructions
Debugging the final product with the inclusion of one small connector
Downloading code into SRAM
C source-level debugging using Zilog Developer Studio (ZDS II)
Developer
Studio
Zilog
for more information about USB Smart Cable and ZDS II.
USB Smart
Figure 37. Typical ZDI Debug Setup
Emulator
Cable
C
O
N
N
E
C
O
R
T
Target Board
Product
eZ80
Product Specification
Figure 37
eZ80F92/eZ80F93
Zilog Debug Interface
displays a typi-
®
162

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