HD64F3644DV Renesas Electronics America, HD64F3644DV Datasheet - Page 164

• Manufacturer Part Number: HD64F3644DV
• Description: IC H8/3644 MCU FLASH 64QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 ROM
Rev. 6.00 Sep 12, 2006 page 142 of 526
REJ09B0326-0600
; Execute prewrite
PREWRT: MOV.W @R2+,
PREW:
PREWRS: INC
LOOPR1: SUBS
LOOPR2: DEC
ABEND1:
PWVFOK: ADDS
PWADD2: INC
;
ERASES: MOV.W #H'0000,
ERASE:
Execute erase
MOV.W @R2+,
BRA
MOV.B #H'00,
MOV.W #H'a,
MOV.B #H'00
MOV.B R1H,
MOV.W #H'FE5A,
MOV.B R4L,
MOV.B R4H,
MOV.B #H'36,
MOV.B R4L,
MOV.W R5,
BSET
MOV.W R4,
BNE
BCLR
MOV.B #H'50,
MOV.B R4L,
MOV.B #H'b,
BNE
MOV.B @R3,
BEQ
CMP.B #H'06,
BEQ
ADD.W R5,
BRA
Write error
MOV.W @R2,
CMP.W R4,
BNE
BRA
MOV.W #H'd,
ADDS
PRETST
R6L
#0,
#1,
LOOPR1
#0,
R4H
LOOPR2
PWVFOK
ABEND1
PREWRS
#1,
PREW
R1L
PRETST
#1,
R3
R3
R6L
R5
R1H
@R3
R4
@TCSRW:8 ;
@TCW:8
R4L
@TCSRW:8 ;
R4
@FLMCR:8 ;
R4
R4
@FLMCR:8 ;
R4L
@TCSRW:8 ;
R4H
R1H
R6L
R5
R3
R4
R3
R6
R5
R6
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Dummy-increment R2
Prewrite start address
Prewrite-verify fail counter
Set prewrite loop counter
Prewrite-verify fail counter + 1
Write H'00
Start watchdog timer
Set prewrite loop counter
Set P bit
Wait loop
Clear P bit
Stop watchdog timer
Set prewrite-verify loop counter
Wait loop
Read data = H'00?
If read data = H'00, branch to PWVFOK
Prewrite-verify executed 6 times?
If prewrite-verify executed 6 times, branch to ABEND1
Double the programming time
Prewrite again
Address + 1
Start address of next block
Last address?
If not last address, prewrite next address
Used to test bit R1L +1 in R0
Branch to PRETST
Erase-verify fail counter
Set erase loop counter
Erase-verify fail counter + 1
R3
R6
R6H