HD64F3644DV Renesas Electronics America, HD64F3644DV Datasheet - Page 341

IC H8/3644 MCU FLASH 64QFP

HD64F3644DV

Manufacturer Part Number
HD64F3644DV
Description
IC H8/3644 MCU FLASH 64QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3644DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Receiving: Figure 10.13 shows an example of a flowchart for data reception. This procedure
should be followed for data reception after initializing SCI3.
1
2
3
PER, FER in SSR
Figure 10.13 Example of Data Reception Flowchart (Asynchronous Mode)
Read bit RDRF
Read bits OER,
Clear bit RE to
Continue data
Read receive
OER + PER
+ FER = 1?
data in RDR
RDRF = 1?
reception?
0 in SCR3
in SSR
Start
End
No
Yes
No
4
Receive error
processing
Yes
No
Yes
(A)
1.
2.
3.
4.
Section 10 Serial Communication Interface
Read bits OER, PER, and FER in the
serial status register (SSR) to determine
if there is an error. If a receive error has
occurred, execute receive error
processing.
Read SSR and check that bit RDRF is
set to 1. If it is, read the receive data
in RDR. When the RDR data is read,
bit RDRF is cleared to 0 automatically.
reading of bit RDRF and RDR before
receiving the stop bit of the current
frame. When the data in RDR is read,
bit RDRF is cleared to 0 automatically.
If a receive error has occurred, read bits
OER, PER, and FER in SSR to identify
the error, and after carrying out the
necessary error processing, ensure that
bits OER, PER, and FER are all cleared
to 0. Reception cannot be resumed if
any of these bits is set to 1. In the case
of a framing error, a break can be
detected by reading the value of the RXD
pin.4.
When continuing data reception, finish
Rev. 6.00 Sep 12, 2006 page 319 of 526
REJ09B0326-0600

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