HD64F3644DV Renesas Electronics America, HD64F3644DV Datasheet - Page 272

• Manufacturer Part Number: HD64F3644DV
• Description: IC H8/3644 MCU FLASH 64QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 Timers
Timer Control Register X (TCRX)
TCRX is an 8-bit read/write register that selects the valid edges of the input capture signals,
enables buffering, and selects the FRC clock source.
TCRX is initialized to H'00 upon reset and in standby mode, watch mode, subsleep mode, and
subactive mode.
Bit 7 Input Edge Select A (IEDGA): Bit 7 selects the rising or falling edge of the input capture
A input signal (FTIA).
Bit 7: IEDGA
0
1
Bit 6 Input Edge Select B (IEDGB): Bit 6 selects the rising or falling edge of the input capture
B input signal (FTIB).
Bit 6: IEDGB
0
1
Bit 5 Input Edge Select C (IEDGC): Bit 5 selects the rising or falling edge of the input capture
C input signal (FTIC).
Bit 5: IEDGC
0
1
Rev. 6.00 Sep 12, 2006 page 250 of 526
REJ09B0326-0600
Bit
Initial value
Read/Write
IEDGA
R/W
Description
Falling edge of input capture A is captured
Rising edge of input capture A is captured
Description
Falling edge of input capture B is captured
Rising edge of input capture B is captured
Description
Falling edge of input capture C is captured
Rising edge of input capture C is captured
7
0
IEDGB
R/W
0
6
IEDGC
R/W
5
0
IEDGD
R/W
4
0
BUFEA
R/W
3
0
BUFEB
R/W
2
0
CKS1
R/W
1
0
(initial value)
(initial value)
(initial value)
CKS0
R/W
0
0