HD64F3644DV Renesas Electronics America, HD64F3644DV Datasheet - Page 348

• Manufacturer Part Number: HD64F3644DV
• Description: IC H8/3644 MCU FLASH 64QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 Serial Communication Interface
Receiving: Figure 10.18 shows an example of a flowchart for data reception. This procedure
should be followed for data reception after initializing SCI3.
Rev. 6.00 Sep 12, 2006 page 326 of 526
REJ09B0326-0600
1
2
3
Figure 10.18 Example of Data Reception Flowchart (Synchronous Mode)
Read bit RDRF
Clear bit RE to
Continue data
Read bit OER
Read receive
data in RDR
RDRF = 1?
reception?
0 in SCR3
OER = 1?
in SSR
in SSR
Start
End
No
Yes
No
4
Overrun error
processing
Yes
No
Yes
4
Clear bit OER to
error processing
error processing
End of overrun
Overrun error
Start overrun
processing
0 in SSR
1.
2.
3.
4.
Read bit OER in the serial status register
(SSR) to determine if there is an error.
If an overrun error has occurred, execute
overrun error processing.
Read SSR and check that bit RDRF is
set to 1. If it is, read the receive data in
RDR. When the RDR data is read, bit
RDRF is cleared to 0 automatically.
When continuing data reception, finish
reading of bit RDRF and RDR before
receiving the MSB (bit 7) of the current
frame. When the data in RDR is read,
bit RDRF is cleared to 0 automatically.
If an overrun error has occurred, read bit
OER in SSR, and after carrying out the
necessary error processing, clear bit OER
to 0. Reception cannot be resumed if bit
OER is set to 1.