MC9S12XDP512CAG Freescale Semiconductor, MC9S12XDP512CAG Datasheet - Page 1139

• Manufacturer Part Number: MC9S12XDP512CAG
• Description: IC MCU 512K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDP512CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 32 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (24-ch x 10-bit)
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• For Use With: DEMO9S12XDT512E - BOARD DEMO FOR MC9S12XDT512EVB9S12XDP512E - BOARD DEMO FOR MC9S12XDP512
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
Clock Register
Written
Check
Address, Data,
Access Error and
Protection Violation
Check
Simultaneous
Multiple Flash Block
Decision
Command
Bit Polling for
Command Completion
Check
Buffer Empty Check
Read: FCLKDIV register
1.
2.
3.
Figure 27-30. Example Mass Erase Command Flow
yes
Mass Erase Command 0x41
Write: FSTAT register
Clear CBEIF 0x80
START
Write: Flash Block Address
Write: FCMD register
FDIVLD
and Dummy Data
Set?
Read: FSTAT register
Read: FSTAT register
MC9S12XDP512 Data Sheet, Rev. 2.21
yes
ACCERR/
yes
no
CBEIF
Write: FCLKDIV register
Block?
no
CCIF
Set?
Set?
EXIT
PVIOL
Set?
Flash
Next
no
no
yes
yes
no
Clear ACCERR/PVIOL 0x30
Write: FSTAT register
by 128K
Decrement Global Address
NOTE: FCLKDIV needs to
be set once after each reset.
Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2)
1141