MC9S12XDP512CAG Freescale Semiconductor, MC9S12XDP512CAG Datasheet - Page 330

IC MCU 512K FLASH 144-LQFP

MC9S12XDP512CAG

Manufacturer Part Number
MC9S12XDP512CAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDP512CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
119
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
For Use With
DEMO9S12XDT512E - BOARD DEMO FOR MC9S12XDT512EVB9S12XDP512E - BOARD DEMO FOR MC9S12XDP512
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
7.3.2.14
330
Reset
Reset
Reset
Reset
Reset
Reset
Reset
W
W
W
W
W
W
W
R
R
R
R
R
R
R
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Timer Input Capture/Output Compare Registers 0–7
15
15
15
15
0
0
0
0
0
0
0
7
7
7
Figure 7-19. Timer Input Capture/Output Compare Register 0 High (TC0)
Figure 7-21. Timer Input Capture/Output Compare Register 1 High (TC1)
Figure 7-23. Timer Input Capture/Output Compare Register 2 High (TC2)
Figure 7-25. Timer Input Capture/Output Compare Register 3 High (TC3)
Figure 7-20. Timer Input Capture/Output Compare Register 0 Low (TC0)
Figure 7-22. Timer Input Capture/Output Compare Register 1 Low (TC1)
Figure 7-24. Timer Input Capture/Output Compare Register 2 Low (TC2)
Bit 14
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
Bit 6
14
14
14
14
0
0
0
0
0
0
0
6
6
6
MC9S12XDP512 Data Sheet, Rev. 2.21
Bit 13
Bit 13
Bit 13
Bit 13
Bit 5
Bit 5
Bit 5
13
13
13
13
0
0
0
0
0
0
0
5
5
5
Bit 12
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
12
12
12
12
0
0
0
0
0
0
0
4
4
4
Bit 11
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
11
11
11
11
0
0
0
0
0
0
0
3
3
3
Bit 10
Bit 10
Bit 10
Bit 10
Bit 2
Bit 2
Bit 2
10
10
10
10
0
0
0
0
0
0
0
2
2
2
Freescale Semiconductor
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
0
0
0
0
0
0
0
9
1
9
1
9
1
9
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
0
0
0
0
0
0
0
8
0
8
0
8
0
8

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