MC9S12XDP512CAG Freescale Semiconductor, MC9S12XDP512CAG Datasheet - Page 392

IC MCU 512K FLASH 144-LQFP

MC9S12XDP512CAG

Manufacturer Part Number
MC9S12XDP512CAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDP512CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
119
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
For Use With
DEMO9S12XDT512E - BOARD DEMO FOR MC9S12XDT512EVB9S12XDP512E - BOARD DEMO FOR MC9S12XDP512
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 8 Pulse-Width Modulator (S12PWM8B8CV1)
Either left aligned or center aligned output mode can be used in concatenated mode and is controlled by
the low order CAEx bit. The high order CAEx bit has no effect.
Table 8-11
mode.
8.4.2.8
Table 8-12
or center aligned) and 8-bit (normal) or 16-bit (concatenation).
8.5
The reset state of each individual bit is listed within the
details the registers and their bit-fields. All special functions or modes which are initialized during or just
following reset are described within this section.
392
The 8-bit up/down counter is configured as an up counter out of reset.
All the channels are disabled and all the counters do not count.
Resets
is used to summarize which channels are used to set the various control bits when in 16-bit
summarizes the boundary conditions for the PWM regardless of the output mode (left aligned
1
PWM Boundary Cases
Counter = $00 and does not count.
(indicates no duty)
(indicates no duty)
CONxx
CON67
CON45
CON23
CON01
>= PWMPERx
>= PWMPERx
PWMDTYx
$00
$00
XX
XX
Table 8-11. 16-bit Concatenation Mode Summary
PWMEx
PWME7
PWME5
PWME3
PWME1
MC9S12XDP512 Data Sheet, Rev. 2.21
Table 8-12. PWM Boundary Cases
(indicates no period)
(indicates no period)
PWMPERx
PPOLx
PPOL7
PPOL5
PPOL3
PPOL1
>$00
>$00
$00
$00
XX
XX
1
1
PCLKx
Section 8.3.2, “Register Descriptions”
PCLK7
PCLK5
PCLK3
PCLK1
PPOLx
1
0
1
0
1
0
CAEx
CAE7
CAE5
CAE3
CAE1
PWMx Output
Always high
Always high
Always high
Always low
Always low
Always low
Output
PWMx
PWM7
PWM5
PWM3
PWM1
Freescale Semiconductor
which

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