HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 118

MPU 3V 0K PB-FREE 208 FP

HD6417705F133BV

Manufacturer Part Number
HD6417705F133BV
Description
MPU 3V 0K PB-FREE 208 FP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417705F133BV

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
105
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
The area from H'F000 0000 to H'F0FF FFFF is for direct access to the cache address array. For
more information, see section 4.4, Memory-Mapped Cache.
The area from H'F100 0000 to H'F1FF FFFF is for direct access to the cache data array. For more
information, see section 4.4, Memory-Mapped Cache.
The area from H'F200 0000 to H'F2FF FFFF is for direct access to the TLB address array. For
more information, see section 3.6, Memory-Mapped TLB.
The area from H'F300 0000 to H'F3FF FFFF is for direct access to the TLB data array. For more
information, see section 3.6, Memory-Mapped TLB.
The area from H'FC00 0000 to H'FFFF FFFF is reserved for the on-chip module control registers.
For more information, see section 24, List of Registers.
Physical Address Space: This LSI supports a 29-bit physical address space. As shown in figure
3.5, the physical address space is divided into eight areas. Area 1 is mapped to the on-chip module
control register area. Area 7 is reserved.
For details on physical address space, refer to section 7, Bus State Controller (BSC).
Rev. 2.00, 09/03, page 70 of 690
Figure 3.5 External Memory Space
H'0400 0000
H'0800 0000
H'0C00 0000
H'1000 0000
H'1400 0000
H'1800 0000
H'1C00 0000
H'1FFF FFFF
H'0000 0000
(On-Chip module
(Reserved Area)
control register)
Area 0
Area 1
Area 2
Area 3
Area 4
Area 5
Area 6
Area 7

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