HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 319

MPU 3V 0K PB-FREE 208 FP

HD6417705F133BV

Manufacturer Part Number
HD6417705F133BV
Description
MPU 3V 0K PB-FREE 208 FP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417705F133BV

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
105
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
This LSI has a clock pulse generator (CPG) that generates an internal clock (I ), a peripheral clock
(P ), and a bus clock (B ). The CPG consists of oscillators, PLL circuits, and divider circuits.
9.1
A block diagram of the CPG is shown in figure 9.1.
CPGS312B_000020020100
Seven clock modes
Selection of seven clock modes depending on the frequency ranges and crystal oscillation or
external clock input.
Three clocks generated independently
An internal clock for the CPU and cache (I ); a peripheral clock (P ) for the peripheral
modules; a bus clock (B = CKIO) for the external bus interface.
Frequency change function
Internal and peripheral clock frequencies can be changed independently using the phase-locked
loop (PLL) circuit and divider circuit within the CPG. Frequencies are changed by software
using the frequency control register (FRQCR) settings.
Power-down mode control
The clock can be stopped for sleep mode and software standby mode and specific modules can
be stopped using the module standby function.
Features
Section 9 Clock Pulse Generator (CPG)
Rev. 2.00, 09/03, page 271 of 690

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