HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 176

MPU 3V 0K PB-FREE 208 FP

HD6417705F133BV

Manufacturer Part Number
HD6417705F133BV
Description
MPU 3V 0K PB-FREE 208 FP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417705F133BV

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
105
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
6.3.1
IPRA to IPRH are 16-bit readable/writable registers in which priority levels from 0 to 15 are set
for on-chip peripheral module, and IRQ and PINT interrupts.
Bit
15 to 0
Table 6.2
Register
Note: * Always read as 0. The write value should always be 0.
As shown in table 6.2, on-chip peripheral module, or IRQ or PINT interrupts are assigned to four
4-bit groups in each register. These 4-bit groups (bits 15 to 12, bits 11 to 8, bits 7 to 4, and bits 3
to 0) are set with values from H'0 (0000) to H'F (1111). Setting H'0 means priority level 0
(masking is requested); H'F means priority level 15 (the highest level).
Rev. 2.00, 09/03, page 128 of 690
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRG
IPRH
Interrupt Priority Level Setting Registers A to H (IPRA to IPRH)
Bit Name
IPR15 to
IPR0
Interrupt Sources and IPRA to IPRH
Bits 15 to 12
TMU0
WDT
IRQ3
PINT0 to PINT7
DMAC
Reserved *
TPU0
TPU2
Initial Value
0
Bits 11 to 8
TMU1
REF
IRQ2
PINT8 to PINT15
SCIF0
Reserved *
TPU1
TPU3
R/W
R/W
Description
These bits set the priority level for each interrupt
source in 4-bit units. For details, see table 6.2.
Bits 7 to 4
TMU2
Reserved *
IRQ1
IRQ5
SCIF2
USB
Reserved *
Reserved *
Bits 3 to 0
RTC
Reserved *
IRQ0
IRQ4
ADC
Reserved *
Reserved *
Reserved *

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