HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 571

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

20.13
Port N is an 8-bit input/output port with the pin configuration shown in figure 20.13. Each pin has
an input pull-up MOS, which is controlled by the port N control register (PNCR) in the PFC.
20.13.1 Register Description
Port N has the following register. For details on the register address and access size, see section
24, List of Registers.
20.13.2 Port N Data Register (PNDR)
PNDR is an 8-bit readable/writable register that stores data for pins PTN7 to PTN0. Bits PN7DT
to PN0DT correspond to pins PTN7 to PTN0. When the pin function is general output port, if the
port is read, the value of the corresponding PNDR bit is returned directly. When the function is
general input port, if the port is read, the corresponding pin level is read.
PM4MD1 PM4MD0 Pin State
0
1
Port N data register (PNDR)
PMCR State
Port N
0
1
0
1
NF
Setting
Prohibited
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
Port N
Figure 20.13 Port N
Read
PMDR value Data can be written to PMDR but no effect
PMDR value Written data is output from the pin.
Pin state
Pin state
PTN7 (input/output)
PTN6 (input/output)/DPLS (input)
PTN5 (input/output)/DMNS (input)
PTN4 (input/output)/TXDPLS (output)
PTN3 (input/output)/TXDMNS (output)
PTN2 (input/output)/XVDATA (input)
PTN1 (input/output)/TXENL (output)
PTN0 (input/output)/SUSPND (output)
Write
on pin state.
Data can be written to PMDR but no effect
on pin state.
Data can be written to PMDR but no effect
on pin state.
Rev. 2.00, 09/03, page 523 of 690