HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 562

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Table 20.5 Port E Data Register (PEDR) Read/Write Operations
PEnMD1 PEnMD0 Pin State
0
1
Note: n = 0 to 7
20.6
Port F is an 8-bit input port with the pin configuration shown in figure 20.6. Each pin has an input
pull-up MOS, which is controlled by the port F control register (PFCR) in the PFC.
20.6.1
Port F has the following register. For details on the register address and access size, see section 24,
List of Registers.
20.6.2
PFDR is an 8-bit readable/writable register that stores data for pins PTF7 to PTF0. Bits PF7DT to
PF0DT correspond to pins PTF7 to PTF0. When the pin function is general output port, if the port
is read, the value of the corresponding PFDR bit is returned directly. When the function is general
input port, if the port is read the corresponding pin level is read.
Rev. 2.00, 09/03, page 514 of 690
Port F data register (PFDR)
PECR State
Port F
Register Description
Port F Data Register (PFDR)
0
1
0
1
Other function PEDR value
Output
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
Port F
PTF7 (input/output)/ASEMD0 (input)
PTF6 (input/output)/ASEBRKAK (output)
PTF5 (input/output)/TDO (output)
PTF4 (input/output)/AUDSYNC (output)
PTF3 (input/output)/AUDATA3 (output)/TO3 (output)
PTF2 (input/output)/AUDATA2 (output)/TO2 (output)
PTF1 (input/output)/AUDATA1 (output)/TO1 (output)
PTF0 (input/output)/AUDATA0 (output)/TO0 (output)
Read
PEDR value
Pin state
Pin state
Figure 20.6 Port F
Write
Data can be written to PEDR but no effect on
pin state.
Written data is output from the pin.
Data can be written to PEDR but no effect on
pin state.
Data can be written to PEDR but no effect on
pin state.