HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 754

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 15 Serial Communication Interface (SCI)
Bit 7—Transmit Data Register Empty (TDRE): Indicates that data has been transferred from
SCTDR1 to SCTSR1 and the next serial transmit data can be written to SCTDR1.
Bit 7: TDRE
0
1
Bit 6—Receive Data Register Full (RDRF): Indicates that the received data has been stored in
SCRDR1.
Bit 6: RDRF
0
1
Note: SCRDR1 and the RDRF flag are not affected and retain their previous values when an error
Rev.7.00 Oct. 10, 2008 Page 668 of 1074
REJ09B0366-0700
is detected during reception or when the RE bit in SCSCR1 is cleared to 0.
If reception of the next data is completed while the RDRF flag is still set to 1, an overrun
error will occur and the receive data will be lost.
Description
Valid transmit data has been written to SCTDR1
[Clearing conditions]
•
•
There is no valid transmit data in SCTDR1
[Setting conditions]
•
•
•
Description
There is no valid receive data in SCRDR1
[Clearing conditions]
•
•
•
There is valid receive data in SCRDR1
[Setting condition]
When serial reception ends normally and receive data is transferred from
SCRSR1 to SCRDR1
When 0 is written to TDRE after reading TDRE = 1
When data is written to SCTDR1 by the DMAC
Power-on reset, manual reset, standby mode, or module standby
When the TE bit in SCSCR1 is 0
When data is transferred from SCTDR1 to SCTSR1 and data can be
written to SCTDR1
Power-on reset, manual reset, standby mode, or module standby
When 0 is written to RDRF after reading RDRF = 1
When data in SCRDR1 is read by the DMAC
(Initial value)
(Initial value)