HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 876

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 17 Smart Card Interface
17.3.6
Initialization: Before transmitting and receiving data, the smart card interface must be initialized
as described below. Initialization is also necessary when switching from transmit mode to receive
mode, or vice versa. Figure 17.7 shows a sample initialization processing flowchart.
1. Clear the TE and RE bits in the serial control register (SCSCR1) to 0.
2. Clear error flags FER/ERS, PER, and ORER in the serial status register (SCSSR1) to 0.
3. Set the GM bit, parity bit (O/E), and baud rate generator select bits (CKS1 and CKS0) in the
4. Set the SMIF, SDIR, and SINV bits in the smart card mode register (SCSCMR1).
5. Set the value corresponding to the bit rate in the bit rate register (SCBRR1).
6. Set the clock source select bits (CKE1 and CKE0) in SCSCR1. Clear the TIE, RIE, TE, RE,
7. Wait at least one bit interval, then set the TIE, RIE, TE, and RE bits in SCSCR1. Do not set the
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CKE1 value
Port value
SCK
SCK
serial mode register (SCSMR1). Clear the CHR and MP bits to 0, and set the STOP and PE
bits to 1.
When the SMIF bit is set to 1, the TxD pin and RxD pin both go to the high-impedance state.
MPIE, and TEIE bits to 0.
If the CKE0 bit is set to 1, the clock is output from the SCK pin.
TE bit and RE bit at the same time, except for self-diagnosis.
Data Transmit/Receive Operations
Figure 17.6 Difference in Clock Output According to GM Bit Setting
Specified
width
Width is
undefined
(b) When GM = 1
(a) When GM = 0
Specified
width
Width is
undefined
CKE1 value
Port value