UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 1169

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(4) CPU I/F bus control register (CPUBCTL)
2
1
0
Bit position
After reset: Undefined
CPUBCTL
The CPUBCTL register controls the interface between bridge circuit and CPU.
The CPUBCTL register can be read or written in 16-bit units.
BULKWAIT
DATAWAIT
NOWAIT
15
0
7
0
Bit name
R/W
14
0
6
0
Address: 00200408H
Forcibly inserting the 1 wait (bulk wait) when the bulk register is accessed.
Forcibly inserting the 1 wait (data wait) after the CPU bus cycle.
Setting enables/disable the no wait operation of CPU bus cycle.
0: No forcibly insert the bulk wait
1: Forcibly insert the bulk wait
Note The setting is invalid in write accessing, the bulk wait is forcibly inserted.
0: No forcibly insert the data wait (default value)
1: Forcibly insert the data wait
0: No wait disables
1: No wait enables
Note 1 wait or more is inserted.
13
0
5
0
Note
CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
(default value)
12
0
4
0
Note
(default value)
11
Function
0
3
0
BULKWAIT
10
0
2
DATAWAIT
9
0
1
Page 1169 of 1509
NOWAIT
8
0
0