UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 697

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(3) Timer trigger mode
In this mode, converting the signal of the analog input pin (ANI0 to ANI11) specified by the ADA0S register is
started by the compare match interrupt request signal (INTTAA2CC0 or INTTAA2CC1) of the capture/compare
register connected to the timer. The INTTAA2CC0 or INTTAA2CC1 signal is selected by the ADA0TMD1 and
ADA0TMD0 bits, and conversion is started at the rising edge of the specified compare match interrupt request
signal. When the ADA0CE bit is set to 1, the A/D converter waits for a trigger, and starts conversion when the
compare match interrupt request signal of the timer is input.
When conversion is completed, regardless of whether the continuous select, continuous scan, one-shot select, or
one-shot scan mode is set as the operation mode by the ADA0MD1 and ADA0MD0 bits, the result of the
conversion is stored in the ADA0CRn register. At the same time, the INTAD signal is generated, and the A/D
converter waits for the trigger again.
When conversion is started, the ADA0EF bit is set to 1 (indicating that conversion is in progress). While the A/D
converter is waiting for the trigger, however, the ADA0EF bit is cleared to 0 (indicating that conversion is stopped).
If the valid trigger is input during the conversion operation, the conversion is aborted and started again from the
beginning.
If the ADA0M0, ADA0M2, ADA0S, ADA0PFM, or ADA0PFT register is written during conversion, the conversion is
stopped and the A/D converter waits for the trigger again. However, writing to these registers is prohibited in the
one-shot select mode/one-shot scan mode.
Caution To select the timer trigger mode, set the high-speed conversion mode. Do not input a trigger
Remark
during the stabilization time that is inserted once after the A/D conversion operation is enabled
(ADA0M0.ADA0CE bit = 1).
The trigger standby status means the status after the stabilization time has elapsed.
CHAPTER 15 A/D CONVERTER
Page 697 of 1509