UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 328

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UPD70F3765GF-GAT-AX

Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3765GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
7.9
or UARTC1) signals can be selected as the capture trigger input of TAA1 and TAB0.
the LIN reception transfer rate of UARTCn can be calculated (n = 0, 1).
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
In the V850ES/JG3-H and V850ES/JH3-H, the alternate-function pins of ports or peripheral I/O (TAA1, TAB0, UARTC0,
If the signal input from the UARTCn pin is selected by the selector function when RXDCn is used, baud rate errors of
(1) Selector operation control register 0 (SELCNT0)
Selector Function
The SELCNT0 register is an 8-bit register that selects the capture trigger for CAN0, TAA1, and TAB0.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Note
Cautions 1. To set the ISEL4, ISEL3, and ISEL0 bits to 1, set the corresponding function pin to
SELCNT0
μ
After reset:
PD70F3770 and 70F3771 only
2. Set the ISEL4, ISEL3, and ISEL0 bits when the operation of TAA1, TAB0, and
3. Be sure to set bits 7 to 5, 2, and 1 to “0”.
the capture input mode.
UARTC0, UARTC1, and CAN0 are stopped.
ISEL0
ISEL4
ISEL3
00H
0
1
0
1
0
1
0
7
Note
R/W
TIAA11
RXDC1
TIAA10
RXDC0
TIAB02
CAN0 TSOUT
6
0
(alternately functions as P35) pin
(alternately functions as P34) pin
(alternately functions as P51) pin
(alternately functions as P91) pin
(alternately functions as P31) pin
Address:
Selection of
Selection of
Selection of
5
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
signal
FFFFF308H
ISEL4
TIAA11 capture trigger
TIAA10 capture trigger
TIAB02 capture trigger
4
ISEL3
3
2
0
input signal
input signal
input signal
1
0
ISEL0
0
Note
Page 328 of 1509

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